Denial

A replacement board for the 2 DRAM chips on C64 and C64c boards 250466 and 250469 is now available.

This little board replaces the two 64k x 4 bits DRAM ICs with a single static RAM IC. Accordingly it consumes only a trickle amount of power, about 5mA. It also acts as a VSP bug fixer.

The product's name is SaRuMan-64 and it costs 13.25$US or 12 Euros.
Get 20% off when you order 5, 25% off when you order 10 or more. Distributor pricing on 25 units or more.

Shipping cost is the same as with PLAnkton; shipping a small packet (up to 12 units) to the US is 8$. Shipping cost for Europe, Australia and South America is 10$US or 8 Euros.
Get a 10% discount on up to 3 PLAnktons if you order them at the same time.

The product is strictly shipped with antistatic protective packaging. It is covered by a 90 days money back guarantee and a 3 year replacement guarantee afterwards.

NOW SHIPPING!

Added:
Ray Carlsen has created a guide on how to install SaRuMan-64 on C64 boards with 8 DRAM ICs. http://personalpages.tds.net/~rcarlsen/ ... PLACEMENT/
and
How to install SaRuMan-64 on the Plus/4. http://personalpages.tds.net/~rcarlsen/ ... LACEMENTS/

In the SX-64: http://personalpages.tds.net/~rcarlsen/ ... EPLACEMENT

SaRuMan this time wins

It also acts as a fix to the VSP bug as a bonus side effect. DRAM is getting difficult to get (although supposedly Abra Electronics has thousands of units in stock) and consumes lots of power.

This specific version of SaRuMan (there are 3) does not need pins 1 and 18 for the DRAM IC on the left and only pin 18 for the one on the right because all 4 of them are ground connections and very difficult to desolder.

The design for SaRuMan uses TSSOP package for all ICs so and no ICs are above DIP pin contacts which allows it to be installed UNDER the C64/64c mainboard if so desired. This, of course, requires removing the metal shield but in my case, that's no problem as I have removed them all and used nickel paint inside the case as shielding instead.


Here is the schematic:

Ray Carlsen has used on of my modules to replace all 8 DRAM ICs on an older board 250407.
The 8 DRAM chips needed about 240mA of power in all. The single module now uses less than 5mA.

Very Cool! This motivates me to try something I've thought about for a while: to do something similar on the C128. I wouldn't de-solder the sixteen 64Kx1s in the flat model or even the four 64Kx4s in the 'D, though, but instead disable them by making their /RAS and /CAS high.

Richardc64 wrote: ↑Sun Nov 03, 2019 9:45 am Very Cool! This motivates me to try something I've thought about for a while: to do something similar on the C128. I wouldn't de-solder the sixteen 64Kx1s in the flat model or even the four 64Kx4s in the 'D, though, but instead disable them by making their /RAS and /CAS high.

From what I see on your schematics, generally, that should work.

Where do you tap the signals to effectively disable them?

brain wrote: ↑Sun Nov 03, 2019 2:12 pm Where do you tap the signals to effectively disable them?

The /RAMCASs are at R29 and R30. I'm not certain about the /RAS resistor: It looks like R7 in the flat schematic and R1 in the 'D. All three Rs are 68ohm. R29 and R30 are near the DRAMs and I expect the /RAS resistor is nearby. I'll have to check. Use an ohmmeter to determine which end of a resistor goes to the DRAMs and which end goes to the sources of the respective signals; U9 for the /RAMCASs and the VIC-III for /RAS.

Good News: R29 and -30 can be removed without accessing the solder side of the board. I expect the same is true of the /RAS resistor. Again, I'll have to check.

This thread is the first I've heard of the VSP bug.

New lower price!

URLs have been added in the first post to guides created by Ray Carlsen on how to install SaRuMan-64 on C64 boards with 8 DRAM ICs and on the Plus/4.

eslapion wrote: ↑Sat Dec 14, 2019 4:01 am (...) how to install SaRuMan-64 on (...) Plus/4.

But on SARUMAN-64 there is not pins for getting the CPU CLOCK signal, so it can't be used into a C16 or PLUS4,
or I have lost some information?

MCes wrote: ↑Wed Dec 18, 2019 1:52 pm

eslapion wrote: ↑Sat Dec 14, 2019 4:01 am (...) how to install SaRuMan-64 on (...) Plus/4.

But on SARUMAN-64 there is not pins for getting the CPU CLOCK signal, so it can't be used into a C16 or PLUS4,
or I have lost some information?

Did you see any clock signal going to the DRAM on the C64 or the Plus/4 ? I did not. The latching of the lower addresses alleviates any need for a clock signal - the DRAM performs this as part of its normal access operations and SaRuMan-64 uses a 74AHCT573 to do it.

I suspect you may not know exactly why the extra OR gate for the CLK - R/!W is required when using static RAM on TED machines. I suggest you look at this: http://www.melon64.com/forum/viewtopic. ... 4&start=15

Sidenote:
On the VIC-20, you absolutely don't need to use the clock signal to add RAM even when it's directly attached to the non-multiplexed bus for 2 reasons:
1. The architecture is not intended to allow adding RAM available to the video chip - added RAM is for the CPU only.

2. There is no system for accessing/refreshing DRAM so at no time is there a 'refresh row' signaled on the address bus.

To make it simply: C16 is a PLUS4 without some I/O and with less memory, but the system is the same : the 264 system (TED, CPU, timings...).

If saruman-ted need CLK signal to work into '264 system it implies that this signal is also necessary for the saruman in PLUS4!
(and the address multiplexing is not implicated in this)

eslapion wrote: ↑Wed Dec 18, 2019 6:11 pm I suspect you may not know exactly why the extra OR gate for the CLK - R/!W is required when using static RAM on TED machines.

Thanks for worrying about me, but don't worry, it's a FACT that I know how '264, static & dynamic RAM work: my project worked at first shot......

MCes wrote: ↑Thu Dec 19, 2019 1:59 am If saruman-ted need CLK signal to work into '264 system it implies that this signal is also necessary for the saruman in PLUS4!
(and the address multiplexing is not implicated in this)

You need the CLK signal only when using static RAM and only because the stupid TED stretches the CAS and R/W into the the following half cycle where the low addresses (sometimes) shift for the refresh cycle. So you only get problems after a CPU write and only IF it is followed by a refresh cycle.

There is more than one solution to this problems and using an inexpensive OR gate with the CLK-R/W signals happens to be one of the least expensive and simplest solution but it's really not the only one. I know of at least 3.

Thanks for worrying about me, but don't worry, it's a FACT that I know how '264, static & dynamic RAM work: my project worked at first shot......

Whoa... the master has spoken! This is the way!

I'm happy my project didn't work at first try. It forced me to look deeper into how the TED works and learn more from it. Unlike you, I disclosed my findings for everyone's benefit.

Well, what if I made you, just for you, a C16 expansion that doesn't use the CLK signal and works perfectly well ? Very easy, just like Saruman-64, latch the lower addresses when RAS=0...

The DRAM doesn't receive the CLK signal and it doesn't need it because it latches the address lines. It's the only difference with static RAM.