It's based on a 65C02 (so it can't has the illegal opcodes).
It has the 8501 spec that are used in C16 Plus4:
1) the 7bit I/O
2) it can run @2MHz
3) it manage the GATE signal for R/W holding (prevent RAM corruption)
4) time spec respected from clock input line (slave CPU)
5) It don't need any ROM replacement and work also with 1541 and datassette, also with auto turbo...
For example a 6510 based solution don't meet the points before,
but a FPGA based solution could meet them and implement also the execution of the illegal opcodes
The prototype:
. Can't wait for your project to become a reality!
)
