Had a decent day in the VIC-20 lab this afternoon.
Once I moved the 250,000 volt prototype out of the basement, I ran the wood-stove for a few hours, and then had my lab back.
Blasting rocks down here was not a good idea, since I cracked one of my windows from the intense sonic boom!
From now on, retro computing is all I shall do down here.
The VGER-20 prototype now seems to be hardware complete. I don't think I will add anything else.
The wiring is a disaster, I have no schematic, but all of my testing today was promising.
Instead of going for the graphics bling, I spent some time and tried a basic File System Load and Run test.
I made a 4gb binary image on my PC that contained a simple User Console as well as a few Cartridge ROMS.
That image was then written in RAW format to an SD card using a hex editor.
I programmed the AVR to allow the VIC-20 to call up files from the SD card.
The File System is extremely crude at this point, but it does prove that everything works.
The sequence of events after power up is also a bit bizarre, but no more than the VIC-20 memory map!
Here is what happens in the Video I made...
1) VGER-20 System is powered up (VIC-20, FPGA, and AVR).
2) The FPGA shoves a small "KickStart" program into Block5 of the 32 Expansion memory.
3) The VIC-20 boots, and executes the KickStart as if it was a standard Cartridge ROM.
4) KickStart copies itself back to location 4096 in the VIC-20 internal Memory (Basic Memory).
5) Kickstart then requests VGEROS from the AVR.
6) The AVR loads VGEROS into Block5 of the Expansion Memory.
7) The AVR signals that the load is complete, and then the VIC-20 jumps there and runs the OS.
The OS in this case, is just a very basic User Console that allows me to list the SD files and load them.
Loading a file works like this...
1) VIC User mounts an SD card and then displays a list of files.
2) User does "LOAD FILE", and then VIC asks the FPGA to load the File.
3) The VIC now jumps to the Kernal (internal Block-0) to avoid a memory conflict.
4) The FPGA now steals the BUS and loads the file data to the 4MB Data Memory.
5) The Kernal is then signaled, and it copies the binary from Data Memory back to Block-5.
6) Once copied, the Kernal asks for a VIC-20 reset, and the program starts up.
Communication between AVR and FPGA is a dedicated bit banged serial bus.
I also redid the GPU to be multitasking. It now has 3 separate function pipelines.
It seems complex, but allows for easy bank switching and program chaining.
Here is a photo of the complete mess I made of the wiring as all hardware is now added...
VGER-20 Hardware is now completed.
It's a good thing I am done with the hardware, since I have no more board space!
The completed unit will fit a cartridge case eventually, but the breadboard is much larger.
I had some fun loosing at some of my favorite games as well today...
A simple Cart Loader that also shows a companion image
The companion image on the VGA screen is just a simple way to test the File System.
Anytime I load a .CRT file (Cartridge ROM), a matching bitmap is displayed if it exists.
Maybe I will extend this to show a slideshow with game history, rules, author info, release date, etc.
Here is a video of VGER-20 loading and running some Cart ROMS from an SD Card...
https://youtu.be/GJAZmfzgHEg
The next step will probably take some time... creating a true VGER-20 Kernal.
I need a decent Kernal in the VIC-20 internal memory to get access to all GPU functions.
Wiring cleanup is also on the ToDo list, as I can't stand looking at this mess!
So far so good... only a few more years before my project is complete!
... is anything ever complete??
Cheers!
Radical Brad