Eslapion wrote:
"The datasheet says the AMR is 4.0V or above, not 3,6V<Vcc<4.0V..."
I have problem with english language, but you (if you are honest) have oculistic problem: Vcc AMR is from -0.5V to 4.0V at exlusion of Recommended Operation Conditions (ROC) from 3.0V to 3.6V, so if 3,6<Vcc<4.0 then Vcc is inside AMR and out of ROC.
You try to cnvince thet Vcc= -0,3V could be a good project choise!
I suggest to read this short article, it's clear and the author appear reliable.
http://www.analog.com/en/analog-dialogu ... ue-50.html
Eslapion:
I have sold more than 1100 of them so far and I didn't see a flurry of replacement requests because the CPLD has busted, in fact I never had any.
This is the proof that Xilinx engineers (at opposite as you)had a good conservative designe choose, not else.
Eslaption wrote :
The C64 uses NMOS and TTL-LS technology chips. CMOS IC powered at 3.3V signaling to CMOS technology powered at 5V ... I configured PLAnkton to work with a C64 that uses Commodore ICs. For these, the proper level is not the same ..."
Into C64 the address bus A12,13,14,15 are 5V pull-upped by 3,3K to determinate 1111xxxx.xxxxxxx when VICII get BUS and put CPU in 3state,
tecnically the same solution that I suggest and Xilinx suggest for XC9536XL (3,3Vcc) that produce a 5V rail to rail output!
Eslaption think that everybody else are wrong: I (and this could be..) , Xilinx engineers, and now Commodore engineers developers too!
Eslapion:
There are EIGHT outputs on PLAnkton (or a genuine PLA), not 2 so EIGHT pull-up resistors would be required according to you.
OK: you has admitting that your (bad) choice is motivated by cost of 8 resistors, not 2.
Anybody can see the cost of the just choose (9pin net resistors): less than 0.1$!!!!!!
Eslapion:
You don't account for the exponential conduction curve of the diode... this is a combination of LTI and non-linear components which include the diode and the power consumption of the CPLD.
You also don't account for the fact the XC9536XL on PLAnkton is tied to a 100pF capacitor which it charges and discharges about 2.02 million times per second. Since the energy stored in a capacitor is calculated 1/2xCxV^2, this means the energy expended increases to the square of the voltage. If the voltage rises, the system will consume more power and stabilizes itself.
I never laughed so much before!
For you the gaussian distribution of production tolerance of Vf is a vertical line!
For you the reducing of drop voltage of diode (Vf) with rising of temperature is a tale for child!
For you into a C64 the Vcc between pin14 and pin18 of PLA can be only 5.000000000V without noise overlapped!
The discussion about energy stored in a capacitor is RIDICULOUS, only sand into the eyes.
You are offending the mind of anybody who is reading!
I think that we were side by side when somebody ask us "Do you want the blu or the red pill?"
Who is reading can made a own idea about who is living in the real world and who not.