Denial

I am hoping someone can clarify the state of the CA2 on VIA#1 ($9110) on a real VIC.

I'm working on validating the operation of the VIA's in my own FPGA based VIC20 and for this I am using the tests from VICE, however some of the tests for the shift registers give a state of the VIA Interrupt Flag Register that I don't understand.

For the VICE Shift Register tests via_sr - viasrXXifr.prg, all of these have test results that indicate bit 0 of the IFR is set in the 8th cycle of the test, bit 0 being CA2 active edge and I can't see what would cause an active edge to be generated on CA2 !! CA2 for VIA#1 is the cassette motor output.

The VICE SR tests configure all VIA registers to zero, then set the shift register to a specific mode and monitor either the shift register register OR the IFR. I get good results with my VHDL when monitoring the shift register, but I don't ever get bit 0 set when monitoring IFR and I can't see why it should be set either.

Setting all VIA registers to zero will actually configure CA2 as "input negative edge" and I'm wondering if the results given in the VICE tests are due to some interaction with the analog cassette motor drive circuit when CA2 is configured as an input (normally it would be an output).

I have tried running the tests on my VIC20, but I get different results to those expected and different to my VHDL. On my VIC it seems bit 0 of the IFR is generally (always?) stuck ON and I'm beginning to think I may have a partially faulty VIA, but without another VIC on which to test I can't confirm that.

If anyone is able to explain the behaviour and / or run the VICE shift register tests on another VIC to confirm the expected results that would be most appreciated.

Kevin

i wrote those tests and verified they are correct on my vic20 (PAL) - keep in mind though that a lot of them still do not work correctly in VICE

cant really explain the behaviour of the VIA either, wish i could =P

Interesting, so at least that kind of confirms that the test results are good, the VIA in my VIC is bad, and yes I am aware that VICE has the VIA shift register badly wrong.

So its looking like the cassette motor drive is interacting with the CA2 pin when its configured as an input. Looking at the schematic there is effectively an RC circuit there, I'll try to do some math and see if state change on CA2 relates to the RC network in any way. I believe the VIA's have an internal pull up resistor which will be part of that circuit, but I don't know the value, so I'll have to do some guessing.

Another option is to rework the tests slightly so that CA2 isn't configured as an input, therefore removing any influence on the test results..

Kevin

Another option is to rework the tests slightly so that CA2 isn't configured as an input, therefore removing any influence on the test results..

uhm, no. the tests deliberately use all kind of configurations - including those that "make no sense". because emulation should behave the same even for these the only exception would be when a test uses a configuration that does not give deterministic results. there should probably be no tape drive connected when running those tests for that matter

If CA2 is driven as a result of an external RC network, then the test results would not be deterministic because the results would be dependent on the component tolerances of the external analog circuit, hence why I was suggesting masking that bit.

Anyway, from some math it seems possible that the cassette motor interface may be causing the state change on CA2, but that depends on which VIC schematic is actually correct. Some schematics have a 0.01uF capacitor on the base of the darlington driver, other schematics don't. I doubt we would see a state change at the point where it apparently occurs without a capacitor.

For the purposes of validating my VHDL I'm going to ignore IFR bit 0 for now, but I may try to experiment a bit on my real VIC to better understand why CA2 sees a state change.

if you find out that it actually matters.... please say so (and perhaps report a bug on the vice tracker)