SuperCPU for the Vic-20

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Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

TLovskog wrote:
Kakemoms wrote: The decoder reads every databyte on the databus regardless of what is happening. I decided to lock in to address bus changes to keep it "simpler". After reading the first byte it looks up a table to see if that is an instruction, then reads the given number of address changes and keeps the databytes.

...
I had a similar idea at one time to catch certain internal writes. In theory it should work like a charm, but there was still a worry and itch of getting out of sync.

What do you think about that?

Cool project. Cool progress.
Yea, had the SYNC signal been present on the expansion bus, that would have been like a warm summer breeze.

You can certainly run a full 6502 in parallel, but to keep the size down, this is mostly based on tables and some special handling code.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Short update:

I have been able to get "some" text on the VGA monitor by poking to screen memory in the Vic-20. But its not as straight forward as I thought since I use automatic level shifters between the 3V MachXO and the 5V 6502. There is plenty work that remains and I may need to go to a non-automatic level shifter to always be able to read the 6502 databus. Fortunately I have space for that on the pcb.

There are still some bugs on the 2232D USB interface which I don't really understand. HW bus routing seems to be ok, and the only response from FTDI is that the 2232D is old and I should upgrade to 2232H... :-P Oh well, I have space for a 232, so it may end with that. Doesn't really matter, its just irritating that the 2232 isn't playing along.

The SDCard interface will probably be based on a 6502 implementation of FAT32. That will save alot of FPGA resources so that other nice things can be implemented. I am thinking of a VIA interface for I/O and some other things. :wink:
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Finally! The 2232D USB interface works :mrgreen: A pulldown instead of a pullup, plus a poor solder... and days of tearing out my hair.

It means that updating the SuperVixen in the field will be easy. Once I start shipping, you will want to update it a few times (as new features are implemented and old bugs get hammered to death). With the 2232, it is simply a matter of downloading the Lattice Diamond programming utility, starting it, selecting a file and press "program". No third party software will be needed.
BobPhoenix
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Re: SuperCPU for the Vic-20

Post by BobPhoenix »

I would be interested in one when you do a second run of these since the first run is spoken for.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

BobPhoenix wrote:I would be interested in one when you do a second run of these since the first run is spoken for.
Ok. I will probably order a second batch once the first is finished.

So, in the meantime I have made a 6502 bus decoder that decides what is happening inside the 6502. E.g it reads its instructions by looking at the databus. The most problematic part was not the extra cycles that some instructions get (page crossing), but the adding of a register to a storage instruction. E.g. STA ($ZP),Y does not show which location that is targeted on the databus. Happily, the LSB of the address bus is available (A0-A13 is on the expansion port), so I had to use that to get things working easily (instead of keeping track of X and Y register which would have given a much larger Verilog code).

Anyway, with all the STA instructions working, the VGA monitor now shows this:
IMG_6654.JPG
The second column (mirroring the first) is due to a small bug (its an easy fix once I bother). The last line is line 24 which is not on the Vic-20 startup screen. I still have to add registers to the VGA control (but now I can acutally use the internal VIC 6560/1 registers to set the VGA screen) 8)

Here is a bigger picture with a video input on the PC (it shows the actual VIC output):
IMG_6655.jpg
So only thing that remains now is to implement all memory modifying instructions.. :roll:
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Some bug fixes and color implemented:
IMG_6673.JPG
Next thing is multicolor and background/border color.

I haven't synchronized it with the internal raster counter yet, but since the VGA is 60Hz and this is a 50Hz PAL machine, that is obviously not going to work. For a NTSC machine it should be straight-forward, but for a PAL I will have to find a compromize like syncing the start of the frame each half second (both NTSC and PAL will start a frame at the same time, but they are out of sync for half a second). In my head that is going to work if you run a NTSC game (e.g. raster effects), but not for PAL. I have to think of something smart for PAL games.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

My kids fighting to play with the Vic-20.. in single color mode with background and border color changed. lol.
IMG_6681.jpg
The bus decoder is reading all data from the MOS6502 and decoding it. So even if the whole display memory and all registers for the VGA are in the MachXO3, changing color is a matter of using POKE36879 on the Vic-20 side. The nice part is that games work and can be displayed on the VGA, even without the output from a VIC 6560/6561 (you still need a VIC chip inside the Vic-20 since it generates the internal clock).
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Well, I thought this post was going to be about how hard it was to get multicolor going, but unfortunately its going to be a very short post:
IMG_6686.jpg
So now, all is working... Except raster effects.

I do have an idea on how to get raster effects working correctly, independent of whether its PAL or NTSC. In fact, it shouldn't be too difficult for most programs/games. The idea is to use a raster buffer. I can put in changes to border-, screen-, aux-color and char map registers into such with the basis of VIC's internal raster position (the program will always read that at a point if it contains raster effects).

For more complicated raster effects (like my unexpanded Vic-20 mouse pointer), this may not work very well. The reason is that changing bytes on the screen map at certain timings would require a very large buffer.

Double buffering of screen is not implemented. The reason is that memory is not segmented yet. The internal MachXO3 memory (48KiB) is all mapped towards the 65C02 for max speed. I will play around with this later to see if I can find a good solution.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Well, things happening fast here before I go south in a couple of hours.

Screen map register has been implemented, so without expansion RAM, the VGA now shows the 7680 map correctly:
IMG_6710.jpg
Changing the Vic-20 register to show another memory location also works. Here I have the VGA showing ZeroPage as output:
IMG_6711.jpg
I though this was possible on a Vic-20 too, but apparently the Vic-20 does not support using $0000 as a location for the screen map. Well, I have never tested it before, so no wonder..

As you may guess, any location between $0000 and $1E00 can now be used as a screen map. The Vic-20 will not show the screen on its CRT output if its below $1000, but the SuperVixen will. I am not shure if its compatible with Mike's VFLI mod... I still have to do that on one of my machines (and I will soon!).

I also tried to implement character map (same location $0000 to $1FFF) but there is still some bug.. I will have to look into it next week.
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beamrider
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Re: SuperCPU for the Vic-20

Post by beamrider »

Kakemoms wrote:Well, things happening fast here before I go south in a couple of hours.

Screen map register has been implemented, so without expansion RAM, the VGA now shows the 7680 map correctly:
IMG_6710.jpg
Changing the Vic-20 register to show another memory location also works. Here I have the VGA showing ZeroPage as output:
IMG_6711.jpg
I though this was possible on a Vic-20 too, but apparently the Vic-20 does not support using $0000 as a location for the screen map. Well, I have never tested it before, so no wonder..

As you may guess, any location between $0000 and $1E00 can now be used as a screen map. The Vic-20 will not show the screen on its CRT output if its below $1000, but the SuperVixen will. I am not shure if its compatible with Mike's VFLI mod... I still have to do that on one of my machines (and I will soon!).

I also tried to implement character map (same location $0000 to $1FFF) but there is still some bug.. I will have to look into it next week.
The Vic-20 can indeed use $0000 for both screen and character. See ex6.zip in this post [scroll around all four directions with joystick to see the behaviour.]

The example locates the screen at address zero, after the raster split for the bottom status area section, in order to display the static text. Some hoops were jumped through to get it working without visible areas overlapping with garbage characters. Also, as documented in the thread, VICE behaves somewhat differently to real hardware.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Well, back from travels and I tested this once again with corrected pokes. I also tested vice and got a completely different result...

Here are the screens before poke (you can see the pokes in the program). Vice set to no expansion, Vic-20 without expansion memory active, and SuperVixen copying the Vic-20:
IMG_6754.jpg
After starting the short program which simply moves screen to location $0000, we can see that both the Vic-20 and SuperVixen shows memory location $000-$1F9, but Vice shows some garbled graphics (seems like character map has shifted and screen map is not really showing well):
IMG_6755.jpg
Edit:
I punched the wrong values into Vice, but it works when I do the correct ones... except for Vice showing a black background :P Anyway, the SuperVixen seems to work-ish. Its not showing stack page well, but that is because I have not added stack instructions yet. There is also some differences between Zero page and Vic-20, so some bug there. Color is zero, which is because memory is set to zero at start.. Well, some work remains, but it seems like we are getting there. :roll:

As a result of the 6502 bus decoder reading the Vic-20 bus and copying all bytes, once the 65C02 starts, one will have to choose if the $0000-$1FFF area is to show Vic-20 internal memory AND display its data, or be used for the 65C02. E.g. the 65C02 can run in "do-not-poke-graphics-area mode" (while that area is being shown) or the decoder has to stop putting the 6502 data into the graphics area. It should be possible to do this on a per-1KiB area, so that both the Vic-20 bus and the 65C02 can access the same memory _if_the_memory_is_not_currently_used_for_showing_graphics (screen mem or char mem). Of course, if you only run programs on the Vic-20 side and use the SuperVixen to show them on a VGA monitor, that doesn't concern you.

(PS: If you are going to use the 65C02 to modify memory in the display area, that is only going to show up on the VGA output and not the VIC-I video output. So, the most compatible way would be to use the internal 6502 to modify display memory while the 65C02 work with other stuff)
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Alot of debugging later and I have character maps showing properly-ish:
VicVGA.jpg
The picture above shows the result of a simple program that puts char map at 7168, with screen at 4096 (which is were it was with a 24K expansion). It then draws the first 44 characters on top of the screen, and fills them with %10101010 and %01010101 bit patterns. The top line has colors changed from 1 to 22 (above 16 it overflows), so character 9-16 is multicolor.
Most of the screen is space (char $20) which I didn't fill with anything, so its just showing some noise. The "R" is the first letter of the word "READY.", and since I put the cursor there, its reversed and thus showing the upper part of the char map. Since internal memory ends at 8191, the upper half of the char map (the total char map is 2048 bytes), wraps up into character ROM. Thus, it shows the memory area 32768 and upwards. So a reversed "R" in this case will show a normal "R" instead, which it does.
The PC still shows the grabbed output of the VIC chip, so we can see that the VGA and VIC chip output corresponds quite ok (some glitches remain, but not so many!).
Here is also the source of the simple program I used above:

Code: Select all

*=8192
main
        ;modify screen position
        sei
        lda $9002
        and #127
        ora #0
        sta $9002
        lda #%11001111   ;1000 screen, 1C00 charmem
        sta $9005
        ldy #3
        ldx #255
lp0
        lda #32
        sta $1000,x
        sta $1100,x
        lda #6
        sta $9400,x
        sta $9500,x
        dex
        bne lp0
        ldx #22
lp1
        dex
        txa
        sta $1000,x
        sta $1016,x
        sta $9400,x
        lda #6
        sta $9416,x
        ;sta $9416,x
        ;sta $942c,x
        txa
        bne lp1     
        ldy #176
lp2
        dey
        dey
        lda #%10101010
        sta $1C00,y
        lda #%01010101
        sta $1C01,y 
        tya
        bne lp2
        rts
I also tried to run a game at this point (CarRace), but it didn't show correctly. I then tried to run a simple demo at $a000 instead (and manually starting it with SYS40960), but it crashed as well. Then I found that there was some strange thing with the BLK5 definition, and I had to stop..

Hopefully it can run some games soon. Raster effects are not in there yet, but both screen map and character map works. Double buffering should also work since it grabs all bytes in the lower 8K memory segment and store them. Upper/lower case graphics also works.

Code: Select all

;Super Vixen screen map locations:

;Screen location  Color  $9005   $9002   Values
;Decimal Hex      Map    Bit7-4  Bit7    $9005  $9002
;0       $0000   $9400   1000    0       128     0
;512     $0200   $9600   1000    1       128     128
;1024    $0400   $9400   1001    1       144     0
;1536    $0600   $9600   1001    0       144     128
;2048    $0800   $9400   1010    1       160     0
;2560    $0A00   $9600   1010    0       160     128
;3072    $0C00   $9400   1011    1       176     0
;3584    $0E00   $9600   1011    0       176     128
;4096    $1000   $9400   1100    0       192     0
;4608    $1200   $9600   1100    1       192     128
;5120    $1400   $9400   1101    1       208     0
;5632    $1600   $9600   1101    0       208     128
;6144    $1800   $9400   1110    1       224     0
;6656    $1A00   $9600   1110    0       224     128
;7168    $1C00   $9400   1111    1       240     0
;7680    $1E00   $9600   1111    0       240     128
So basically the VGA shows everything the VIC will, but it can also put the screen map to the RAM1-RAM3 location as it has the memory inside. Hopefully this is compatible with the VFLI mod (but still untested). Character map can be put to the same area, but for obvious reasons they should not overlap.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Well, I nailed the problem of games not running to glitches with expansion memory communication. It was not obvious as it only happens randomly.

This short program which also increases the memory showed a problem after roughly 20 seconds(!):

Code: Select all

; BLK123 test kopies a 500 byte area back and forth between
; display memory and given memory page (+1)

*=8192
start
        lda #<itxt1
        ldy #>itxt1
        jsr $cb1e       ; print text        
        jsr inputnumber
        lda $4
        sta ipage
        
testing
        sta $5          ; target page
        lda #0
        sta $2
        sta $4
        lda #$10
        sta $3          ; display
        lda #0  ; test pattern
        ldy #0
lp0     sta ($2),y
        sta $9400,y
        sta $9500,y
        iny
        bne lp0
        inc $3
        ldx #$12
        cpx $3
        bne lp0
loop
        lda #0
        sta $2
        sta $4
        lda #$10
        sta $3          ; display
        lda ipage
        sta $5          ; target page
        ldy #0
lp1     lda ($2),y      ; from display
        tax
        inx
        txa
        sta ($4),y      ; to memory page
        iny
        bne lp1
        inc $3
        inc $5
        ldx #$12
        cpx $3
        bne lp1

        lda #0
        sta $2
        sta $4
        lda #$10
        sta $3          ; display
        lda ipage
        sta $5          ; target page
        ldy #0
lp2     lda ($4),y      ; from memory page
        sta ($2),y      ; to display
        iny
        bne lp2
        inc $3
        inc $5
        ldx #$12
        cpx $3
        bne lp2
        jmp loop        ; repeat until eot

itxt1
        text "page no 34-255?",0
ipage
        byte 0
inputnumber
        ; use basic Input statement for 0-255 number:
        ; puts pointer to 3-sign number in $2 & $3
        ; converts number to binary, put in $4
        jsr $CBF9
        ldy #0
        tya
        iny
        cmp $0200,y
        bne *-4         ; find end of string
        cpy #1          ; only one letter
        bne notone
        lda $200
        sta $202
        lda #$30
        sta $200
        sta $201
        ldy #3
notone
        cpy #2          ; only two letters
        bne nottwo
        lda $201
        sta $202
        lda $200
        sta $201
        lda #$30
        sta $200
        ldy #3
nottwo
        dey
        dey
        dey
        tya
        ldy #$02
        sta $2
        sty $3

        ldy #0
        sty $4
        sty $5
        sty $6
        lda ($2),y
        cmp #$20
        bne *+4
        lda #$30        ; was space, so put in 0
        cmp #$30
        bcc nohundred   ;<0 so not a number
        sec
        sbc #$30
        cmp #3
        bcs nohundred   ;>=3 so too large/no number
        sta $4          ; 0,1 or 2
nohundred
        iny
        lda ($2),y
        cmp #$20
        bne *+4
        lda #$30        ; was space, so put in 0
        cmp #$30
        bcc noten       ;<0 so not a number
        sec
        sbc #$30
        cmp #10
        bcs noten       ;>=10 so no number
        sta $5          ; 0-9
noten
        iny
        lda ($2),y
        cmp #$30
        bcc noone       ;<0 so not a number
        sec
        sbc #$30
        cmp #10
        bcs noone       ;>=10 so no number
        sta $6          ; 0-9
        bcc inend
noone
        lda $5          ; last number not there
        sta $6          ; ->use first two
        lda $4
        sta $5
        lda #0
        sta $4
        cmp $6
inend
        lda $4
        cmp #1
        bne inpn1
        lda #100
        sta $4
inpn1   cmp #2
        bne inpn2
        lda #200
        sta $4
inpn2   lda $5
        asl ;*2
        tay
        asl ;*4
        asl ;*8
        clc
        adc $4
        sta $4
        tya
        clc
        adc $4  ; added ($5) * 10
        clc
        adc $6
        sta $4  ; input number in $4
        rts
You just enter the page number of the memory to test, and it will copy that page and the next page back and forth towards the screen. When errors appear, they show up as non-uniformities. Quite a spectacle! :)

You can probably also use this program for other expansions to look for problems, so I also attach it as a zip'ed program file.

Not obvious why this happens, but I suspect timing related glitches.

Edit: I nailed it down to a non-blocking verilog statement that simply was too slow to get things correct. By using a blocking assignment I now ensure that the data on the bus is there before the voltage level shifter direction is set for reading. The test has been running flawless for 10 minutes now.
Attachments
blk123test.zip
(385 Bytes) Downloaded 306 times
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Some more debugging since I had problems with running the unit on different Vic-20s. I nailed some of the problem down to the TXB0108 level shifter I have been using - it just wasn't capable of driving the long bus lines of the Vic-20 and gave a really slow start to the pulse out.

Before:
image.jpeg
After:
image.jpeg
After changing to a SN74LVC4245, the data pulse looks much better. :D The green line represents the D0 signal.
Kakemoms
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Re: SuperCPU for the Vic-20

Post by Kakemoms »

Finally! :D

After some rewiring to get timing issues sorted out, rewriting the logic for fast determination of (low slewrate) clock edge (and much of the code that were dependent on this), and at last working around a few other complicated bugs:
IMG_6836.jpg
This is the Vic-Art demo by Andreas Dietmair that runs from the BLK1 and BLK5 area. It has user mapped character set with realtime updates on the plotted graphics. It has been running for an hour now without any glitches. When I get home tonight (I'm at the local Makerspace) I will test it on another Vic-20 as well.

So, just to get it straight:
This is VGA output FROM a Vic-20. No conversion through the VIC chip. The Supervixen simply reads the 6502 databus (and some of the address bus) and decodes the instructions, and if data is put into the internal RAM, it makes a copy of that into the Supervixen RAM. The Supervixen then outputs this data as a VIC chip would, but on VGA. Why VGA? Well, the point was to enable output to a 4:3 screen, and there are still plenty of VGA screens out there that are close to 4:3 (read: without widescreen). If you want HDMI, there are plenty of $10 adapters out there that should work.

For the next 3 weeks I will be on holiday, but when I get back I will: 1) Get SDCard interface working. 2) Mount, debug and ship the first test units.

Raster effects will be a future update. There is nothing preventing that, but I think its better to get things shipped (and start learing about other bugs that people report back) before making the software even more complicated.

Have a nice summer! :wink:
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