I understand you have personal objections, but without testing we would never know what is possible. There is certainly a lack of data on how much current one can draw from the 6502 lines, but short pulses seems to be ok. For WDC 65C02 I have seen 50mA mentioned and 100mA for the Rockwell 6502 (also see further down).
Whether the cartridges failed from poor ROM processing or copy protection we will never know, but since not every cartridge failed, it is more probable that the silicon processing quality was less than optimal. I would say they probably skipped on QA since accelerated lifetime testing should have picked that up.
I have done some more testing in order to decide how to best pull A13 down without drawing too much current from it.
To do this I wrote a short program:
Code: Select all
*=5000
sei
loop2
ldx #255
loop1
lda $4000,X
sta $1000,x
lda $E000,X
sta $1000,x
lda #7
sta $9400,x
dex
bne loop1
jmp loop2
This gave the following screen output (this data from $E000-$E0FF, e.g. the kernal ROM):
A picoscope showed a 450ns spike on the A13 line (the 3+Volts are due to some wire capacitance of the setup):
Preliminary test showed that a 47Ohm resistor would draw the A13 down (<0.8Volt) so that the screen showed the first data in the Basic ROM instead ($C000-$C0FF), but that is quite some current draw (85mA) and too much for my taste.
Two delay ICs (74LS31N) that gave me around 250-300ns delay were used:
These were used to make a delayed signal that was then put through a NAND with the original A13. The NAND output was fed back into the A13 through a 10 Ohm resistor. To limit the current, a 1KOhm resistor was used to feed the VCC of the NAND IC (74LS00). E.g. max average current draw is 5mA at that setting.
After the modification, the following signal could be observed on the A13:
The output on the screen was then non-stable as no ROM was responding and the 74LS138 in the Vic-20 was not generating a CS signal for neither Basic ROM or Kernal ROM (sorry about the poor picture, but the same characters were on the top part of the screen):
So. This hack seems to work. Its not very safe, so I will have to do long-time testing and such to be sure that nothing gets damaged. Basically its the 6502 that has to deliver all the current, so if damage occurs it will be on the A13 output line.
Edit: I remembered that NMOS is using a pullup resistor (load) on its output to push output high. In the event that the output is low, the NMOS transistors will pull that load as can be seen here:
https://en.wikipedia.org/wiki/NMOS_logic. What we are doing here is basically pulling the same load externally. Still, testing will be the only way to make certain this is safe.