UltiMem

[brain]

FWIW, I looked at the FE3 logic equations, and the WE is qualified by PHI2, so it appears that is not the issue with the FE3.

Does someone have one that wants to test?

Jim

[majikeyric]

I have a FE3, what would you want to test ?

[brain]

dload crosstalk.,prg from the other thread
turn on FE3 and select max memory
run prg
verify errors occur
take out cart
find CR/W pin
Look where trace goes to Atmel CPLD
Find VR/W pin
See if there is a nice way or inconspicuous way to cut the CR/W trace and wire the VR/W pad to that pin of the CPLD
rerun test
See if error persists

Jim

[majikeyric]

Wow I bit too complex for me

someone else maybe ?

[brain]

Well, you should be able to do the first part (testing the FE3 with crosstalk.prg).

Jim

[majikeyric]

I launched crosstalk.prg with max mem and I had no error....

I tried with my both FE3s...

[eslapion]

@Brain
Do you get the ICs factory soldered (with soldermask, etc...) or do you hand solder them with some specific method?

[brain]

@Brain
Do you get the ICs factory soldered (with soldermask, etc...) or do you hand solder them with some specific method?

They are wave-soldered with pick and place equipment by an assembly company. I buy them in 100 unit lots, typically, though I have ordered 250 of some items.

Jim

[eslapion]

@Brain:
Nice!

I failed to spot a JTAG connector on the board for the 144XL. You preprogram the chips?

[brain]

It is underneath the CPLD, just pads, as I use pogo pins to program (less assembly, not need to route. you can solder wires to the pads, as I did in the prototype shots.

Jim

[brain]

A question for folks:

I am planning to add a feature to unhide the registers. I have two options:

store a sequence of values into a memory location (think 55,aa,55,etc.)

or

read from a special sequence of addresses (think $xx55, $xxaa, $xx55, etc.)

Any preference?

Read is less invasive, but might be less robust.

Jim

[brain]

PCB design has been sent out for manufacture.

Jim

[eslapion]

read from a special sequence of addresses (think $xx55, $xxaa, $xx55, etc.)

Any preference?

Read is less invasive, but might be less robust.

If UltiMem is to be used in conjuction with other hardware then I suppose it is less demanding to have a read sequence.

It doesn't require to have a R/!W line.

I think this could be made more robust with a sequence of reads that are unusual and very specific, such as reading the very last byte of IO3, then reading the very last byte of IO2, then the last byte of RAM3, RAM2, RAM1. These 5 areas are all 1k in size and this specific sequence of vastly different regions have in common that all used address lines need to be high.

[groepaz]

I am planning to add a feature to unhide the registers.

in the chameleon we used something like this, which proved to be very robust against accidental re-enabling:
- a write to X (any value) disables the registers
- a write to X+1 (one specific value, we picked "42" ) re-enables the registers
- a write to X+2 (any value) disables the registers

[buzbard]

Ok, I noticed that support has been added to the nightly build of VICE but a ROM image is required.
Where can we find that? Or is it available yet?