Jiffy and ML

[ldxstx]

Hi , I have a problem with my following test code: when I use the registers to control the speed of execution everything's ok, but not when using the low byte of the jiffy clock. I tried to look for some info to solve this in the PRG with no luck. Btw: any ML mentor out there to regularly speak to? In case drop me a PM!
Thank you for your help from a crazy guy who spends his saturday nights this way even knowing what it's like.

Code: Select all

	processor 6502
	
	org $1000		
						
	.byte $00,$0c,$10,$0a,$00,$9e,$36,$36,$35,$36,0,0,0	
										
	org	$1a00		
		
; my vars and constants
OFFSETX = $43			; offset for indexed addressing
STRNLEN = #$02			; string length
ZERO = "0"				; petscii values
NINE = "9"				

; Vic-20 stuff
VIC = $9000				; VIC base addr
JIFFYL = $a2			; jiffy clock: low byte
CHROUT = $ffd2			; print 1 character


main:					
repeat:	
	jsr clear_screen
	jsr print_string
	jsr wait	
	jsr inc_dig	 
	jmp repeat			
	
clear_screen:			
	lda #$93			
	jsr CHROUT
	rts
		
print_string:			
	lda #$00
	sta OFFSETX
.next_char:
	ldx OFFSETX
	lda STRING,x
	inx
	stx OFFSETX
	jsr CHROUT			
	lda OFFSETX
	cmp #STRNLEN		
	bcc .next_char		
	rts
	
inc_dig:			; increment digit(s)
	inc STRING+1
	lda STRING+1
	sec
	sbc #$01			
	cmp #NINE			
	bcs .inc_hi_digit	; when >9 
	rts
.inc_hi_digit:			; increment leftmost digit
	lda #ZERO
	sta STRING+1		
	inc STRING
	lda STRING
	sec
	sbc #$01			
	cmp #NINE
	bcs .reset_hi_lo		
	rts					
.reset_hi_lo:
	lda #ZERO
	sta STRING
	sta STRING+1
	rts
	
wait:
	;lda JIFFYL			; uncomment these 3 lines to use the jiffy clock instead
	;and #60			; ~1s	
	;bne wait
	rts
	ldx #$00			
	ldy #$00
.loopx:	
	inx
	bcc .loopx
	ldx #$00
	iny
.loopy:	
	bcc .loopx
	ldx #$00
	ldy #$00
	rts
		
exit:
	rts
	
STRING:
	.byte "00"

[matsondawson]

Not sure about that AND #60 bit.
Are you trying to trigger on any multiple of 60?
Cause that won't do it.

You're better off deriving your count value from the clock, rather than counting yourself.

[Mike]

The subroutine mentioned in the posting below should do the trick.

http://sleepingelephant.com/ipw-web/bul ... 6&start=17

If you want to implement something like a clock, this would however always add the processing time between the delays into the calculation, so the clock lags behind after a short time. In that case, the right way is to put the routine in the interrupt processing and decode the display right away from the jiffy clock as it's done here:

http://sleepingelephant.com/ipw-web/bul ... .php?t=343

Greetings,

Michael

[ldxstx]

Thank you all,

@Mike: the first routine is perfect to my actual needs, thanks!

Even with that working solution which uses SBC, I'd still like to understand why even this new code snippet won't work (the update pace is not constant in a remarkable way):

Code: Select all

wait:
   lda JIFFYL         
   cmp #60
   bcc wait
   rts 

Greetz

[Mike]

The low-byte of the jiffy clock is counted up by 1 every 1/60 second, and wraps from 255 to 0.

That means, on entry to this sub-routine the byte is either in the range of 0 to 59, and then the routine waits the remaining time until the byte becomes 60 (which already is not constant), or the byte has a value in the range of 60 to 255, and then the routine exits immediately.

For this reason, my routine stores the current time on entry, and then subtracts this value from the running jiffy clock byte, until the difference becomes 60. This also works in case of wrap-around.

[ldxstx]

I think that's because I can't use an absolute value for the comparison, since we don't know how much time has passed since the last update of the low byte of the jiffy. (EDIT - I meant: I don't know the value in the byte when our code executes. Thanks again Mike for your way better explanation)

[ldxstx]

Thanks Mike! (I was writing my post when you submitted yours)