My hardware project :: GCart 2011

Mike · Post by **Mike** » Sat Oct 22, 2011 5:07 am

TLovskog wrote:I have been thinking about beeing able to use the massive (relatively seen) amount of RAM for speeding up BASIC execution, in terms of how you store variable. The goal to reduce the searching for strings etc by the BASIC. It would need ~200 KRAM to have each variable stored at a location defined directly by the first to letters, even if the strings are at maximum 255 characters. However, arrays will mess that up a bit.

I had a somewhat similar idea for FE3, extending the CBM BASIC to show 480K free at the start-up prompt. It would at least have involved extending most internal data-structures to 24-bit address pointers (bank + 16-bit address), variables then need 8 bytes instead of 7. The string garbage collection would need a significant speed up by the use of back-descriptors, like in BASIC 3.5 and above.

Same BASIC as above had a JIT compiler to pre calculate and create a table of GOTO/GOSUBS etc to speed up execution. [...] And even more truth ... it wasn't that great speedup ... But if you do not test, you never know.

Did you take a look at Waterloo BASIC? That's exactly what it does: the tokens of all new keywords are followed by a 16-bit address, the target, when the command diverts control flow.

It has be thought out well enough so one can easily dispense with GOTO and GOSUB.

I have added some trickery in the FPGA hardware to be able to inject code into the VIC at running speed, which means that it could go down to 30-50ms for a 8k block

For the external memory blocks, you could have the external CPU inject the data from file at the right place without any assistance of the 6502.

But with the internal memory, you surely need the 6502 have to execute code like 'LDA #byte:STA target' / 'LDA source:STA I/O_register' in an unrolled loop with that code injection to simulate DMA?

The idea with going public with projects is to have a little pressure to put some action to the words. That said. This is a hobby project with a tight budget and very loose time plan.

No worries.

TLovskog · Post by **TLovskog** » Sat Oct 22, 2011 4:30 pm

Did you take a look at Waterloo BASIC? That's exactly what it does: the tokens of all new keywords are followed by a 16-bit address, the target, when the command diverts control flow. It has be thought out well enough so one can easily dispense with GOTO and GOSUB.

Will have a look at it, thanks for the note.

For the external memory blocks, you could have the external CPU inject the data from file at the right place without any assistance of the 6502.

But with the internal memory, you surely need the 6502 have to execute code like 'LDA #byte:STA target' / 'LDA source:STA I/O_register' in an unrolled loop with that code injection to simulate DMA?

Yes. In the beginning I had thought of having the CoProcessor directly write to the memory. However. The problem is as you note the internal Block 0. So, since I couldn't get that I opted for always going through the VIC, to have one way.

And the injection works just as you say. The VIC will tell the PIC/FPGA that it wants something loaded. The PIC/FPGA will inject the needed unrolled LDA/STA pairs until finished. To compress the data I have thought of doing ...

Code: Select all

LDX #$00
STX $xxxx
STX $yyyy
STX $zzzz
INX
STX $nnnn
STX $oooo
INX
STX $qqqq
...
RTS

For all needed databytes. Typically all $00 -$ff would be needed. And that would be the fastest you could ever load something to the VIC.

Kananga · Post by **Kananga** » Sun Oct 23, 2011 11:33 am

TLovskog wrote:All banks can be switched to any BLK[1-3,5] as well as 3k expansion. Plain memory expansion is possible with protected I/O-2/3 so programs that misbehave do not trigger any switching etc accidentally.

Switching all banks to all BLKs sounds great! If you added DMA for external RAM blocks too, it'd be programmers heaven!

Nice work!

TLovskog · Post by **TLovskog** » Tue Dec 13, 2011 11:24 am

A small update ...

I have not quit the project, but my search for the cheapest 4-layer boards was not a wise move. I opted for a shared, non-profit way forward. The great thing is that it is half price, the poor thing is that more than I seams to use it. Christmas coming up, it looks like my design will not make it until 2/1 2012. Many many weeks lost.

In the mean time I have written as much firmware as I can by simulating the hardware enviroment. However, I am thinking about doing a step between real hardware and no hardware and mock it up with your typical breadboard.

Sourcing of components seams to be moving forward. Only hickup is that Xilinx stopped producing the 5V version of the CPLD I am using in the internal 8k modification. The OLED display I found dirt cheap on e-bay.

eslapion · Post by **eslapion** » Tue Dec 13, 2011 2:18 pm

I remember somebody at the university telling me that the cheapest sources for 4 layer boards were in china.

Take a look at this place and tell me if they give you decent deals.

http://www.pcbcart.com/

TLovskog · Post by **TLovskog** » Tue Dec 13, 2011 3:35 pm

pcbcart is what I usually use. This time it was dorkbotpdx.org and their PCB sharing ...

TLovskog · Post by **TLovskog** » Mon Feb 06, 2012 3:15 pm

It took an absurd amount of time, but I have understood that I was not alone. Alot of problems and vacations came in the way. I think I have waited 3 months in total for these three boards. A personal record for me.

Well anyway here they are and they where very cheap and seem to be of high quality, so I guess that is fine all in all. Mext stop soldering.

I will do this in a couple of steps ...

1) The Xilinx circuit, buffers and SRAM. Once that works ...
2) PIC24, SD CARD and RTC with battery. This will test the booting and code injection.
3) MP3, OLED with buttons and WiFi.

Post by **joshuadenmark** » Mon Feb 06, 2012 3:28 pm

Hi Thomas

Very fine looking boards, like the colors.

Happy soldering

moijk · Post by **moijk** » Sun Feb 12, 2012 4:02 pm

I'm all in for one when it is ready.

The first experience I ever had with a computer was the vic 20. I was no more than 3-4 at that time. I recall I was too young to excel in any games, so I watched my older sister. I recall her favorite game was miner 2049er, and she was so upset when my father wanted to upgrade the vic 20 to the c64 that was just out. I don't recall if my sister ever got around to play that much with the c64 because I grew up enough to get the required reflexes and she lost her place beside the joystick.

The vic 20 was sold, and for years I never thought about it. but now I want to play more with the computer that lit the computer interest in the family. I have a c64, plus4, c128d, amiga 500, 600, 4000, cpc and a bunch of consoles so it's not that unusual project for me.

(well, that was an intro as well)

SkydivinGirl · Post by **SkydivinGirl** » Sun Feb 12, 2012 5:30 pm

Wow! Can't believe I missed this project. I'm very excited to see how it turns out.

Heather

Mike · Post by **Mike** » Tue Feb 14, 2012 3:26 pm

Hi, Thomas,

has the PCB of the 'GCart 8k Internal' also found its way to you?

Greetings,

Michael

TLovskog · Post by **TLovskog** » Tue Feb 14, 2012 3:50 pm

Unfortunately that was canceled.

However, that was just as well. Although I knew Xilinx was about to terminate some of the 5V versions of the CPLD used (XC9500), I still used it. However, they have now issued an end-of-life for the whole 5V series so I took the time to design in another part.

It is starting to be a bit tricky finding modern parts that handles 5V. 5V tolerant inputs is still ok, but driving the good old 5V TTL is harder. In the Cartridge I added 5V-3V3 buffers/levelshifters, since it would probably be a good idea to buffer the address/data bus anyway.

However for the internal part it was wiser to try to find a 5V CPLD, since the rest of the parts where 5V only.

I also had a chance to modify the placement so it should fit more (all?) models of the VIC 20 PCB.

In any case. I am right now finishing the new boards and will hopefully send them away this weekend.

TLovskog · Post by **TLovskog** » Tue Feb 14, 2012 3:53 pm

@joshuadenmark, @moijk, @SkydivinGirl ...

Thanks for the cheerful comments. This is not the fastest moving project of mine, but we are getting there slowly.

Mike · Post by **Mike** » Tue Feb 14, 2012 5:26 pm

TLovskog wrote:Unfortunately that was canceled. [...] In any case. I am right now finishing the new boards and will hopefully send them away this weekend.

Oh, that means I'll have to wait another few weeks for the first prospective re-implementation of my VFLI mod. Sigh.

At least the redesign means you don't have to rely on end-of-life parts ... Good luck.

Leeeeee · Post by **Leeeeee** » Tue Feb 14, 2012 8:13 pm

but driving the good old 5V TTL is harder

You can drive 5V TTL perfectly well with 3.3V CMOS.

Lee.