Denial

Wotcha!

I'm going to want to make a PCB that plugs into the VIC's DIP40 socket, however, it has got to fit within the bounds of the RF shield. I have an NTSC VIC-20 CR model, so I know what the size of the RF shield is for that, and the placement of the VIC socket within it. I'd like to know is what the different RF shield + VIC position configurations are for other NTSC and PAL VIC-20 / VC-20 models.

Can any of you help me please?

Jon.

I just rotated to a 2-prong NTSC. What measurements do you need, exactly? Just the width and depth of that metal cover?

All three dimensions would be useful, please!

Here you go!

I don't know if I'd use these measurements to actually fabricate anything, but they should help determine if something that already exists might fit. Specifically, I measured the dimensions outside the RF box with a ruler, so I might have introduced parallax error.

I took the measurements inside the box with a digital caliper, so those numbers should be more accurate. The measurements around the 6560 are taken from the nearest wall to the socket edge, not the chip.

Nothing is drawn to scale.

This PCB is an Assy #324003.

Thank you! That is most useful - and somewhat distressing at the same time, that's not much clearance at each end of the socket.

JonBrawn wrote: ↑Sun Apr 03, 2022 6:30 am that's not much clearance at each end of the socket.

Can confirm. It's really close to the RF box's wall at both ends.

I assume this is a pre-CR VIC with the 2-pin power plug?

The next thing that's going to plague me is how many 40-pin sockets will I have to pile up to get my PCB to clear the other components within that walled garden?

Could you use a SIL socket like this?

https://www.switchelectronics.co.uk/20- ... 8mm-height

JonBrawn wrote:The next thing that's going to plague me is how many 40-pin sockets will I have to pile up to get my PCB to clear the other components within that walled garden?

I'd think the PCB needs to match the original footprint of the VIC-I in size, more or less.

At least that's the direction similar projects went, to name the SID replacements for C64 or ULA replacements for ZX81:


(www.c64-wiki.com - SwinSID: link)


(vLA81 - ZX81 ULA Replacement: link)

As FPGAs aren't very good at analog, and because I'm interfacing with Commodore's VIC-20 analog electronics, I'm having to do digital to analog stuff on the PCB that is highly specific to the VIC-20, which means around half a dozen I/O pins for each analog output. The prototype is using about 70 I/Os, but that number will go down when I start throwing away bits of resolution, but it's still going to be high. There are also a couple of dozen level shifters required to interface the low-voltage FPGA I/O with the 5V TTL levels coming from the VIC. So far, none of the level shifting devices I've tried have been particularly stellar in their performance. The good news here is that the best that I've come across so far is the cheapest solution.

Given the number of I/Os that need to be brought out of the FPGA and the current lack of availability of many FPGA parts, I'm going to be starting with a PCB that hangs out precariously over the analog electronics in the walled garden. Once I'm happy that it works well enough (were "well enough" includes as many folks as possible testing the wonderfully weird stuff you've all crafted over the years on it) then I might spring for having some smaller boards stuffed with BGA FPGA parts, which might well allow for the appropriate footprint, but on the other side of that coin is the increase in the cost of having to have BGAs soldered down professionally.

The prototype is using a Cyclone IV E development board. The Cyclone IV E device is far too expensive for the final build, so once I've nailed down the design sufficiently I'll be making a new choice (and, no doubt, learning another FPGA development suite). One of the effects of this is that I'm not relying on any of the special features of the Cyclone IV family of devices - the PLLs (which are most excellent), the open-drain outputs, the fast multipliers, so I can migrate from the fancy-dancy Intel part to a somewhat more pedestrian device.

I've had a version of the FPGA connected to the user expansion port of a Dan Werner VIC-2020, snooping all of the bus transfers and mimicking the real VIC's output on a second monitor, so I could get the video timing right. I know I'll have to revisit this when I'm fine-tuning the design to accommodate all the weird edge effect conditions, such as shuffling the X-origin off the side of the display and how that messes up the screen, but it's good enough, for now, to allow me to get on with the interface to the 6560's socket on the PCB.

Which brings me to PAL - I've got a 6561, so I will be doing all the analysis that's required to implement the PAL version of the design, however, I'll need to source a Vicky 20 for that project (because it'll inevitably involve track cutting, green wire additions and leg lifting, which I really don't want to do to a real VIC-20)

srowe wrote: ↑Sun Apr 17, 2022 2:01 am Could you use a SIL socket like this?

https://www.switchelectronics.co.uk/20- ... 8mm-height

You can actually get those as 40-pin DIL packages, used for wire-wrapping projects, but I hope they're too tall!