FE3_2_SUPER_ROM_BUG?

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srowe
Vic 20 Scientist
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Joined: Mon Jun 16, 2014 3:19 pm

FE3_2_SUPER_ROM_BUG?

Post by srowe »

I'm playing around with code to use the various modes of the FE3 and noticed the following in the VICE code base

Code: Select all

/* emulate Final Expansion v3.2 Super ROM write bug */
/*#define FE3_2_SUPER_ROM_BUG*/
I think it refers some discrepancy in whether writes go to bank 0 or 1 in Super ROM mode but I can't find any further details.

I'd like to understand this better before I write too much code that assumes the behaviour described in the original manual (which states writes go to bank 1).
tlr
Vic 20 Nerd
Posts: 567
Joined: Mon Oct 04, 2004 10:53 am

Re: FE3_2_SUPER_ROM_BUG?

Post by tlr »

srowe wrote: Thu Dec 09, 2021 2:19 am I'm playing around with code to use the various modes of the FE3 and noticed the following in the VICE code base

Code: Select all

/* emulate Final Expansion v3.2 Super ROM write bug */
/*#define FE3_2_SUPER_ROM_BUG*/
I think it refers some discrepancy in whether writes go to bank 0 or 1 in Super ROM mode but I can't find any further details.

I'd like to understand this better before I write too much code that assumes the behaviour described in the original manual (which states writes go to bank 1).
I wrote that code. It refers to a bug in the preliminary CPLD for v3.2 which I found when reverse engineering the CUPL code to implement emulation of the cartridge. This bug is AFAIK not present in any released v3.2 CPLD versions.
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srowe
Vic 20 Scientist
Posts: 1340
Joined: Mon Jun 16, 2014 3:19 pm

Re: FE3_2_SUPER_ROM_BUG?

Post by srowe »

tlr wrote: Mon Dec 13, 2021 1:04 pm I wrote that code. It refers to a bug in the preliminary CPLD for v3.2 which I found when reverse engineering the CUPL code to implement emulation of the cartridge. This bug is AFAIK not present in any released v3.2 CPLD versions.
Thanks for the confirmation, I noticed this is commented out so there's no way to build VICE with it. I'm amazed that all the behaviour of FE3 seems to be so faithfully implemented in VICE. A lot easier to debug with than the real thing.
tlr
Vic 20 Nerd
Posts: 567
Joined: Mon Oct 04, 2004 10:53 am

Re: FE3_2_SUPER_ROM_BUG?

Post by tlr »

srowe wrote: Mon Dec 13, 2021 2:48 pm
tlr wrote: Mon Dec 13, 2021 1:04 pm I wrote that code. It refers to a bug in the preliminary CPLD for v3.2 which I found when reverse engineering the CUPL code to implement emulation of the cartridge. This bug is AFAIK not present in any released v3.2 CPLD versions.
Thanks for the confirmation, I noticed this is commented out so there's no way to build VICE with it. I'm amazed that all the behaviour of FE3 seems to be so faithfully implemented in VICE. A lot easier to debug with than the real thing.
Thanks, I guess.:)

I had the CUPL source to work from, but there was also a decent test program by Thomas Winkler to run on the vic20 to verify the bulk of the functionality.
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