SJLOAD

[Diddl]

This JiffyDos Loader is now also available for C-128. Hydrophilic has done a very good Job not only to port this code to C128, but to improve it very well.

see this thread


SJLOAD from Hydrophilic does more than my VIC-20 SJLOAD:

+ LOAD is much more faster cause a special Jiffy load-mode

+ He has changed some vectors more: CHKIN, CKOUT, BASIN, BSOUT. Not only LOAD and SAVE. So also data transfer is faster not only LOAD.


Will try to implement this in VIC SJLOAD also (additional to some bugfix).

[carlsson]

Did Jim Brain yet get someone to re-port the fully JiffyDOS to VIC-20, as opposed to the previous port done under CHS licensing?

[brain]

Did Jim Brain yet get someone to re-port the fully JiffyDOS to VIC-20, as opposed to the previous port done under CHS licensing?

Not yet, but I'm willing to pay to have it done. I have the complete VIC-20 KERNAL disassembly, and the JiffyDOS disassembly, and it looks like one can just port over the small chunks of JD.

You don't know how much I would love to not have to do this port myself.

Jim

[Diddl]

What is CHS licensing?


Why should you make this port again? You have copyrights for Jiffy Code and there is a existing VIC-20 port. So I thought you also have rights for this existing port?


If you have to make a own "brain port", what is to do in this case? Inserting existing procedures into kernel over cassette routines? Or over RS232 Routines?

Or do you have to write new code for VIC-20? It is very difficult to write another implementation cause timing must be exactly same ...

[Mike]

Inserting existing procedures into kernel over cassette routines? Or over RS232 Routines?

That is, how it is normally done.

But would it be possible to fit all JD routines into $0400..$0FFF?

In that case, I could envisage a special FE3 version, which temporarily is activated as ROM in BLK5, autostarts from there, copies all JD routines down to $0400..$0FFF, and then sets BLK5 to RAM.

Michael

[brain]

What is CHS licensing?

Click Here Software (Maurice Randall)

Why should you make this port again? You have copyrights for Jiffy Code and there is a existing VIC-20 port. So I thought you also have rights for this existing port?

It's not that clear. Since the port was done by someone other than CMD. Thus the port author may have partial rights to the port. Based on correspondence with CHS, CHS feels they own partial rights to the VIC and +4 ports and are not interested in licensing those rights.

If you have to make a own "brain port", what is to do in this case? Inserting existing procedures into kernel over cassette routines? Or over RS232 Routines?

Since the VIC and 64 KERNAL is very similar, the plan is to:

• Use the rev3 64 KERNAL and the JD 64 KERNAL to note the changed locations
• Locate the corresponding locations in the VIC-20 KERNAL
• Insert the JiffyDOS code from the 64 version into the VIC version
• Patch up any issues (screen size changes, intro screen spacing, etc.)
• Try to re-implement the CIA code in the 64 port against the VIA. I might look at the VIC-20 SJLOAD code to see how it is done
• Take the modifications and overlay them into the PAL version of the VIC-20 KERNAL (I'd use the NTSC KERNAL for my initial work)
• Send out copies for folks to test
• Assuming all went well, add ROM to catalog.

Or do you have to write new code for VIC-20? It is very difficult to write another implementation cause timing must be exactly same ...

Mind you, my ASM days are long over. I was never great at it, and I am missing a very important piece, a source listing of the un-modified C64 REV3 KERNAL (I have source for the VIC-20 KERNAL, and the JiffyDOS KERNAL). Though, even if I had it, I'm still not sure I'm confident enough to make the port happen.

As it is, though, it's still an issue. Legally, I can't offer VIC-20 ROM overlays while the issue is unsettled, but I know some VIC owners would like legitimate ROMs.

Jim

[Diddl]

[*]Patch up any issues (screen size changes, intro screen spacing, etc.)

You could take directory (@$) from my FE3 sourcecode, since there already is 23 column version of it. This CHS jiffy for VIC has difficult to read directory function (two lines per file).

[*]Try to re-implement the CIA code in the 64 port against the VIA. I might look at the VIC-20 SJLOAD code to see how it is done

It is difficult to change from CIA to VIA. it's a good idea to look into SJLOAD or CHS jiffy ...

[*]Take the modifications and overlay them into the PAL version of the VIC-20 KERNAL (I'd use the NTSC KERNAL for my initial work)

SJLOAD works fine on PAL and NTSC (same code).

But for a VIC Jiffy Kernal you need two versions, cause amall things outside of Jiffy (from original kernal).



I'm waiting for this VIC port. SJLOAD is only a less-than-ideal solution!