6560 FPGA Progress.

[beamrider]

Sorry haven't been following this post in details, but I gather the intention is to create a drop-in replacement for the VIC-1.

1) Can you provide an update as to general progress as the thread has gotten very technical?

2) Also, I meant to ask, will you be fixing the inter-channel distortion that the Vic has on its sound output and also possibly the off-pitch notes? If so I'd be tempted to upgrade one of my working Vics with this.

[Mike]

I am not the OP, but here's my 2 cents:

1) Can you provide an update as to general progress as the thread has gotten very technical?

The thread is prone to remain technical by its very nature. Quite a lot of empirical info about VIC-I's inner workings is strewn across Denial and other sources, and barring a concluded analysis of the VIC-I die itself, the discussion tries to gather relevant points as time unfolds.

As far as I see, there exists a prototyping board with FPGA which (sort of) works as VIC-I replacement, but does not yet reproduce all known behaviour and which also is not yet a drop-in replacement for the VIC-I socket.

2) Also, I meant to ask, will you be fixing the inter-channel distortion that the Vic has on its sound output and also possibly the off-pitch notes? If so I'd be tempted to upgrade one of my working Vics with this.

These are points which, if at all, would only be considered when the replication of VIC-I as FPGA is feature complete.

And even if that's the case - the sound distortion is an effect which contributes to the "typical" sound output of the VIC-20, if you like it or not. Bringing that more into the line of a supposed-to-be linear addition of sound waves has no backing from any mention in the data sheet. Also, your demand to "rectify" the off-pitch tones is doubtable at least. The tone generators work as count-down timers and divide a given reference frequency by an integer number. You get those off-pitch tones as a matter of fact and it is not sensible to "massage" the frequencies to suit anyone's appeal.

[JonBrawn]

I am not the OP, but here's my 2 cents:

As usual, Mike's correct, that is basically the state of the project.

I'm working on the last details of the interlaced video implementation (I've only got one issue left - but it's a doozy, to do with colour artifacts that aren't there with the real 6560)

Next, I have to implement sound. It's not quite as easy as "divide the CPU clock by 17 and that's voice 3", as there are shift registers clocked at different rates and mixing and a linear feedback shift register "random" noise generator, so that's a bunch of research in itself. I've got the C source from the VIC-20 part of VICE, which will give me something to get started with.

Game paddles are complete, but I haven't reproduced the extreme amount of jitter available in the original VIC I

Finally, everybody's favorite: The Light Pen - even though it won't work on flat-screen TVs, I've got a tube set and a light pen, so yeah - I've got to implement it.

That then gives me the Verilog RTL source code for the full design (so, not far away, really)

However, the FPGA on the development board I'm using (a Cyclone IV FPGA) is "unobtainium" verging on "unicornium" (owning one is a fantasy), so I've been looking around for a new FPGA to use. I did find something from Microchip that would serve the purpose, had free development tools, documentation was pretty good, reasonably priced, etc., but the chip programmers are no longer manufactured for the device, so to get a programmer, I'd have to pay the ePay scalpers the best part of $300 to get one, so that's game over for Microchip (their tech support is utterly pants as well, so another reason to walk away from them).

So, I'm now looking at a device that a friend put me on to (Cheers, Rob!) https://www.digikey.com/en/products/det ... 4/15771083 you have to buy a dev board to get the tools, but I was planning to anyway. The tools are a bit light - there's the synthesis/place/route functionality there but no simulator, so I'd have to use some other simulator. This part isn't a "Flash FPGA", which was the case with the Microchip device, so I'll need an external flash device to hold the programming bitstream.

[JonBrawn]

Right, we're getting there! I think the only part of Interlaced mode I've got left to deal with is switching into and out of interlaced mode.

I think somebody mentioned that when you set bit 7 of $9000, it doesn't take effect until the NEXT field starts, and that next field will always be a LOWER (odd) field, is that correct?

Is it also the case that when that bit 7 is cleared, the effect doesn't take place until the start of the next field? I'm not sure that can be the case, though, as someone was talking about royally messing with the VIC by flipping out of interlace mode during the last line of a field, so the end-of-field comparator doesn't fire and the raster counter wanders off into the weeds, counting up to raster 511.

That's the easy questions over with...

We know that at the end of a non-interlaced field, we see rasters in the following order:

Code: Select all

LEFT RIGHT
259  260
260  261
0    1
1    2

And at the end of a 'lower' interlaced field, we get:

Code: Select all

LEFT RIGHT
259  260
260  261
261  262
0    1
1    2
2    3

And at the end of an 'upper' interlaced field, we get

Code: Select all

LEFT RIGHT
259  260
260  261
261  262
262  0
0    1
1    2
2    3

Have any of you observed the raster counts from the end of a non-interlaced field to the first interlaced field?
And, for bonus points, from an upper field to a non-interlaced field and from a lower field to a non-interlaced field?

I'm expecting the sequences to be like the corresponding ones above, but I don't trust the 6560 to not do something completely wild and whacky at the transition, just because it can.

[JonBrawn]

So, I think I might have finished with the video section. Other than TEST7A, TEST8A and TIMING_NTSC, are there any other test programs that I should be running to confirm that it's doing the right thing?

[beamrider]

Assuming you have read and tried the programs in this thread.

viewtopic.php?f=2&t=8620&start=60

[tokra]

and basically anything that starts with vic in this directory of VICE (so the last 6 directories and the included tests):

https://sourceforge.net/p/vice-emu/code ... ogs/VIC20/

[tlr]

So, I think I might have finished with the video section. Other than TEST7A, TEST8A and TIMING_NTSC, are there any other test programs that I should be running to confirm that it's doing the right thing?

Is this strictly NTSC or is PAL also implemented?

[JonBrawn]

This is the NTSC version - however, I have a PAL Vicky 20 with a 6561 and a TV that can display PAL, so that is the direction I'll be heading in next. However, I want to get the NTSC version finished before I start on that.

[JonBrawn]

Assuming you have read and tried the programs in this thread.

viewtopic.php?f=2&t=8620&start=60

Sob... sob... sob... I am now unhappy

[JonBrawn]

(Only kidding - you know I live for this kind of thing)

[JonBrawn]

CHARFLOW-TOKRA KILLED MY VICE!

Ok, so much for the banner headline. Here's what happened and why:

xvic -8 charflow-tokra.d64 # NTSC, has 3K expansion turned on.
load "CF",8
run
Cursor left 13 times
BOOM!

OK, not as mysterious as one might think - when the left offset becomes negative bit 7 is getting set, which enables interlace, and VICE on my Mac doesn't always handle interlace very well and sometimes explodes like this. Ho hum.

Meanwhile, what am I supposed to see with this test because I am not† seeing it on VICE (3.6.1)? I guess I'll have to get down-n-dirty with some real hardware. And then try to reproduce the intended weird behavior. It's a lot easier to do this if you can screenshot VICE and send the image to the printer.

†) Why is the contraction of "am not" "ain't" and not "amn't"? Inquiring minds want to know. Come to think of it, why hasn't the whole thing been contracted to "I'mn't" yet?

[tlr]

This is the NTSC version - however, I have a PAL Vicky 20 with a 6561 and a TV that can display PAL, so that is the direction I'll be heading in next. However, I want to get the NTSC version finished before I start on that.

The reason I asked is that there are probably more (test) programs targeting PAL, demos for instance. I assume the details of the 6560 is very similar, if not identical to the details of the 6561 so the tests will be relevant on either target.

[tokra]

Meanwhile, what am I supposed to see with this test because I am not† seeing it on VICE (3.6.1)? I guess I'll have to get down-n-dirty with some real hardware. And then try to reproduce the intended weird behavior. It's a lot easier to do this if you can screenshot VICE and send the image to the printer.

This is not emulated by VICE yet. You would need to compare to real hardware. VICE still has its limitations when we discover new effects of the VIC-chip. I believe the $9000 and $9001 set to zero-effects are not emulated as well.

[beamrider]

(Only kidding - you know I live for this kind of thing)

I wouldn't get too hung up trying to replicate this behaviour, as mentioned VICE doesn't or any other emulator/FPGA that I'm aware of.

I don't think it impacts any games/demos so far released. In my case it actually led me into a false sense of success that my split-screen pixel scrolling was working when on real hardware, it actually failed.