eslapion wrote:Early versions of PLAnkton were equipped with a 20 Ohms resistor to drop the voltage. Current versions are (since jan. 2017) equipped with a 27 Ohms resistor.
Why change something in a PERFECT project?
eslapion wrote:Also note the voltage at the CPLD does not have a linear relation with the voltage at pin 28 -> 4.75-3.52=1.23V while 5.25-3.895=1.355V
Are you sure you have some kind of technical education?
My nephew can explain you the difference between LINEAR and DIRECT relationship, the first is when INCREMENTAL value has a fixed coefficient (that I MEASURED of 0.75), the second is when this coefficient is equal to 1.
A proof is easy seen: if in your laboratory is present a pen and a piece of squared paper you can draw the measure to see that it describe a line....
eslapion wrote:You also don't account for the fact the XC9536XL on PLAnkton is tied to a 100pF capacitor which it charges and discharges about 2.02 million times per second. Since the energy stored in a capacitor is calculated 1/2xCxV^2, this means the energy expended increases to the square of the voltage. If the voltage rises, the system will consume more power and stabilizes itself.
the dissipation in a resistor is dimensionally equal at your formula: a constant coefficient that multiply the voltage at 2° power: (1/R)*V^2.
Never seen a resistor in a voltage partitor stabilize a voltage.... The real world
denies you ........:
I measured that "the Vcpld increasing is linear with V28-14 increasing (75%)"
eslapion wrote:I was able to run a test version of PLAnkton with the CPLD getting 4.3V at Vcc. Was that magic ?
I told you: the plankton surviving is because Xilinx engineers, as opposite of you, use to be conservative in their project.
Plankton can work despite your project choose
Also, did you check the absolute maximum rating for the DRAM chips ?
A clue: it's NOT 7 volts!
A lot of DRAM have AMR of 6V, someone have 7V (you can't exclude to have this on a board), but important is that every DRAM have a ROC of 5v +-10% so from 4,5 to 5.5V.... your project go out of AMR when DRAMs are drinking coffee inside their ROC...
the hardware bug is proved by the facts, now we can only to wait the "plankton 2° generation"
with a voltage regulator on board...
Into VHDL code you can hide "MCes" as you did in a ROM with Groepaz, I'll consider this like a credit for my help to improve your project..
“Don’t argue with idiots because they will drag you down to their level and then beat you with experience” (Mark Twain ?)