As noted here: http://www.sleepingelephant.com/ipw-web ... =11&t=8177
I am working on a VIC-20 CPU Accelerator.
I know folks are probably too busy, but I was wondering if anyone was interested in helping me write some ML to test out the solution and get it going.
I'd love to set someone up with a piece of HW, a JTAG programmer to put in new Verilog code, and a final unit, if we can get it working, in return for some development efforts.
Jim
VIC-20 Accelerator Code Development Interest?
Moderator: Moderators
Re: VIC-20 Accelerator Code Development Interest?
Well, you don't need to provide me with anything but I can make you some Verilog code if you want to stick to lattice CPLD. If you want some other CPLD when you have to provide some HW at least (I have an old Analog JTAG programmer somewere if that helps).brain wrote:As noted here: http://www.sleepingelephant.com/ipw-web ... =11&t=8177
I am working on a VIC-20 CPU Accelerator.
I know folks are probably too busy, but I was wondering if anyone was interested in helping me write some ML to test out the solution and get it going.
I'd love to set someone up with a piece of HW, a JTAG programmer to put in new Verilog code, and a final unit, if we can get it working, in return for some development efforts.
Jim