VIA timer underflow troubles

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VIA timer underflow troubles

Post by pixel »

I've almost hacked video into that "Ohne Dich" audio player. But I can't get the frames in sync because the high byte of the VIA timer used to measure the pulse lengths doesn't seem to underflow. No negative value to have had. At least in VICE. Is it me once again having a period of brain dysfunction, an incompatibility of VICE or just the end of another crazy dream?

"Video" would be 16x16 pixels with 16 grades of luminance at rougly ten frames per second. A little bit better than in the early days of mechanical television.
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Re: VIA timer underflow troubles

Post by TLovskog »

"A little bit better than in the early days of mechanical television" :-) Hillarious
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Re: VIA timer underflow troubles

Post by groepaz »

VIA is still very buggy in VICE, i wouldnt trust it :) - at least use a snapshot from vice.pokefinder.org, which has most of the really bad problems fixed.
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Re: VIA timer underflow troubles

Post by pixel »

groepaz wrote:VIA is still very buggy in VICE, i wouldnt trust it :) - at least use a snapshot from vice.pokefinder.org, which has most of the really bad problems fixed.
Will try that. Thanks! (But I'll have to build it myself on Linux.) Got a real VIC next to me for ages – now that SD2IEC device came in – and no bloody TV set I dragged through the streets of Berlin wants to tune in properly. As if the universe doesn't want me to work an a real machine. m(
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Re: VIA timer underflow troubles

Post by pixel »

TLovskog wrote:"A little bit better than in the early days of mechanical television" :-) Hillarious
Logie Baird even tried to record video with a gramophone. Check out this: http://www.tvdawn.com/earliest-tv/phono ... s-1927-28/
My tapes sound very much like these records.
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Re: VIA timer underflow troubles

Post by Mike »

pixel wrote:[...]the high byte of the VIA timer used to measure the pulse lengths doesn't seem to underflow. No negative value to have had. At least in VICE.
Should depend on the operation mode of what timer you use.

Timer 1 underflows in one-shot mode. In free-running (a.k.a. 'continuous') mode however, after $0000 it only decrements once more down to $FFFF and in the next cycle then starts again from the latch value. Timer 2 underflows in both interval timer mode and pulse counting mode.
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Re: VIA timer underflow troubles

Post by pixel »

Mike wrote:Timer 1 underflows in one-shot mode. In free-running (a.k.a. 'continuous') mode however, after $0000 it only decrements once more down to $FFFF and in the next cycle then starts again from the latch value. Timer 2 underflows in both interval timer mode and pulse counting mode.
Thanks! I used timer 1 in one-shot mode. I wonder why this information is missing in the documentation. I'm so glad that I don't have to find that out myself anymore.
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Re: VIA timer underflow troubles

Post by Mike »

pixel wrote:Thanks! I used timer 1 in one-shot mode.
Are you sure you didn't mean free-running/continuous mode? That one would actually be symptomatic for the problem you described, i.e. showing $FF in the timer high byte for a single cycle only (for T1 latch values < $FF00 anyway), which would most likely be missed by a polling LDA.

The KERNAL puts T1 in VIA #2 into free-running/continuous mode per default for the keyboard scan/jiffy-clock IRQ.
I wonder why this information is missing in the documentation. I'm so glad that I don't have to find that out myself anymore.
I checked against the VIC-20 Programmer's Reference Guide, and you're right that the PRG doesn't mention T1 is not reloaded from the latches in one-shot mode (one could argue though, that this is the main difference between those two operating modes...)

In my earlier post I was referring to the VIA 6522 data sheet, which can be found on 6502.org (link). There, the different timer operating modes are clearly laid out.
Last edited by Mike on Fri May 08, 2015 4:47 pm, edited 2 times in total.
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Re: VIA timer underflow troubles

Post by pixel »

Mike wrote:Are you sure you didn't mean free-running/continuous mode? That one would actually be symptomatic for the problem you described, i.e. showing $FF in the timer high byte for a single cycle only (for T1 latch values < $FF00 anyway), which would most likely be missed by a polling LDA.

The KERNAL puts T1 in VIA #2 into free-running/continuous mode per default for the keyboard scan/jiffy-clock IRQ.
Pretty sure. I tried both modes with the same result: no negative high byte at all. But hang on! Am just compiling the freshest VICE and will try again soon.
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Re: VIA timer underflow troubles

Post by pixel »

The newest version of VICE is sooo much better on Linux. Don't miss out on it. The build instructions are pretty straightforward but DO NOT compile it with clang. Use the gcc compiler instead or everything will break.

But there still is no negative high byte to have had. The VIA emulation code looks very incomplete and probably doesn't care about the issues Mike mentioned.

Perhaps that won't be required. The video information is messing up the real-time alignment, so there have to be some initial statistics as well to get the playback going.
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Re: VIA timer underflow troubles

Post by darkatx »

It's pretty cool you're designing a Vic-20 video/audio format.
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Re: VIA timer underflow troubles

Post by groepaz »

But there still is no negative high byte to have had. The VIA emulation code looks very incomplete and probably doesn't care about the issues Mike mentioned.
detailed bug report and/or test programs might help with fixing it 8)
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Re: VIA timer underflow troubles

Post by pixel »

groepaz wrote:detailed bug report and/or test programs might help with fixing it 8)
Will come up with something should the real machine ever get attached to everything it needs.
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Re: VIA timer underflow troubles

Post by pixel »

Mike wrote:In my earlier post I was referring to the VIA 6522 data sheet, which can be found on 6502.org (link). There, the different timer operating modes are clearly laid out.
Oops! Missed your post. Sorry. Got my negative high byte now, but the low byte is always 3 in the newest VICE. :shock: Will look into that some time in the future…
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Re: VIA timer underflow troubles

Post by Mike »

pixel wrote:Oops! Missed your post. Sorry.
If anything, I'd have to apologize. I made an edit to that post while you posted a reply to it.
Got my negative high byte now, but the low byte is always 3 in the newest VICE. :shock: Will look into that some time in the future …
If you read T1 count low at the start of an ISR that explicitly handles T1 interrupts *and* the foreground program has a deterministic timing (like a simple JMP *), that arrangement is likely to 'lock' onto a single interrupt latency cycle. As then always the same number of cycles has passed between the VIA causing the interrupt, and the ISR reading T1 low, you'll always read the same value.
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