6522 shift register behaviour.

[Kananga]

I don't know where to put this question, but since it is all about reproducing the original behaviour of the VIC, it may belong here.

The shift register (reg 10 SR) is shifted in our out through CB2. When shifted out, the documentation says the register is rotated, i.e. after 8 shifts the contents is the same as in the beginning.
What happens if you read SR while it is shifted? Do you see the intermediate value or is the register contents always the originally written/fully received value?

In a couple of weeks I'll move in to my new home with enough room for a permanent setup of the old C= hardware. Fun, here I come, Yay!
Presently, I haven't got a Vic-20 at hand, but perhaps one of you knows stuff like that by heart.

[matsondawson]

I suspect you can't read SR during shift. i.e. the shift occurs on a rising edge, and the read occurs on a falling edge. Or maybe the other way around.

[Kananga]

True, intermediate states while shifting are most likely not observable. But perhaps you could read the state between shifts.
Starting from SR=0 you could perhaps read a %00000001 after one bit is shifted in.

After some more reading, I am pretty sure Commodore didn't use the SR at all due to the bugs in the 6522 implementation mentioned everywhere.

So, emulators probably don't implement SR.

[Diddl]

VIA has a shift register and a latch. You only can read and write the latch. On writing to latch it transfers content to SR. After receiving 8 bits contents of SR is transferred to latch.


But I think there was a big error in this SR hardware of VIA. This is the reason why 1541 disk drive is so slow. Commodore want to do transfer by VIA shift register (burst mode), but this hardware failure makes ommodore must do it in software (slowly).

When 1571 was developed, Commodore did a new try and was succesful with burst mode. CIA doesn#t have this problem from VIA.