Over the week, I managed to pick away at the first part of the schematic (The Memory Expansion System).
There are some untested changes I hope to verify this weekend, but most of it is know to work...The Memory Expansion System
- right click on View Image for larger view.
This section is really just the extended memory that the VIC runs the new OS from.
The 512K is broken into 16 pages of 32K, each having a different "hot swappable" program.
Since the internal VIC memory is shared, I can hot switch between pages to transfer information.
An example of this might be during the creation of a new game, I will swap from the Assembler IDE into the Sprite Editor, and then return with a set of graphics coordinates to place in the code. I could pop out to the 6502 Help Page to check out the cycle count for a certain instruction, and then swap over to the Music Tracker to work on the game into music.
With 16 pages (Applications) available, I should have a very complete development environment running on my VIC-20!
Some explanation of how the posted schematic works...
245.01 and 02 are bidirectional Data Bus buffers. 01 controls access to the OS Memory, and 02 sends read or write requests to what will be the multiple memory mapped devices such as Sync Memory, 6502 Memory, and low level logic functions.
245.03 and 04 are the address buffers.
These buffers keep load driving to a minimum for the VIC, and being 74HC logic, are almost invisible anyhow.
157.01 controls the Boot Mode, and has the job of holding the VIC in reset as the OS memory is populated on power up.
The OS Memory is SRAM, but it is boot loaded by ROM on power up.
This lets me use self modifying code and easily upgrade the OS when required.
Once the OS Memory is loaded, the 157 swaps all functions back to the VIC, and takes it out of reset.
574.01 is a data latch to the current page of the OS Memory. 16 pages requires 4 bits from the Data Bus.
To achieve seamless hot swapping of OS Memory pages, I have a common "Kernal2K" routine in the internal VIC memory that is accessed to control page swapping. This way, the changeover of memory does not cause any glitches in the operation. The secondary 65C02 that will run the assembled code also uses this banking scheme to get access to more memory, 8 pages of 64K in that case.
One other feture of this system is that it can be totally disabled without unplugging from the expansion port, leaving the VIC-20 starting up in unexpanded mode. There is a "Run" button on the V2K system that triggers the Boot Mode, so the VIC actually starts up unaware that it has super powers. Since I also like to program in "native" mode, this was a requirement.
If I get my chores done today, I might have time to put down all the new wires and run some tests tonight.
I pulled up all chips and wires the other day, as I didn't like where the VIC-20 plug was located on the breadboard.
Yeah, like I said... this is a project that will require mucho patience!