VIC-2000 Expander. Modern Power Using Retro Parts!

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Radical Brad
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

Well, it ain't pretty but I have shown that the IO system does function as intended.
The World's first dual display VIC-20?...

Image

The basic program shown on the NTSC monitor draws the pattern shown on the VGA monitor by poking the X and Y location as well as color value through the IO system on the logic board. The resulting image is using the lower resolution of 400 x 300, and only 64 of the 4096 available colors.

The reason for the digital noise is due to the way I slapped this all together for testing.
When the VIC does "POKE 38917,0", it is triggering the WE line to go low on the frame buffer SRAM.
That same line attempts to disable the counters that are actually generating the video frame.
Because of the few nanoseconds of bus turnaround time, the memory gets the odd glitch.

In my real design, there will be no such quirks, and everything will be double buffered.
Double buffered means the VIC is drawing a screen at its leisure while the SyncGen is displaying another.
When the VIC (or GPU) is ready, it simply issues the command to flip the buffers.

Oh, and that simple pattern took VIC Basic more than 10 minutes to draw!
I wouldn't want to raytrace a complex scene in basic, that's for sure.

Ok, now I have some serious decisions to make so that I can move forward.
Seeing this cool "Dual Display VIC-20", I almost think this is the way to go.

.. run the IDE / Assembler on the original VIC display, and let the assembled program run on the VGA display.
I will have my decision by tomorrow.

Later,

Radical Brad
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

Thanks!
Yeah, I am certainly convincing myself that is the way to go as well.
Gives the VIC huge power, but keeps it original at the same time.

Brad
KilrPilr wrote:Hi Brad,
Great work you are doing. Very interesting read.

I vote option 1. Dual display seems very interesting and opens up huge possibilities I believe!

Keep up the good work!
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by eslapion »

Radical Brad wrote:Well, it ain't pretty but I have shown that the IO system does function as intended.
I ain't pretty but it's more impressive than a lot of stuff I ever saw a VIC-20 display.
The World's first dual display VIC-20?...
Nope, I was able to get dual display with the Protecto 80 but the 'secondary' display was 80 column monochrome text only.

I think what you did here is very far beyond what the 6545 can do.
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Floopy »

I know this question is totally off topic, and may sound stupid to some of you, but where do you get your breadboards? The cheap ones on Ebay are horrible and I don't know where to look else. I think someone might know which ones are good or not. Sorry for the intrusive question.
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by eslapion »

Floopy wrote:I know this question is totally off topic, and may sound stupid to some of you, but where do you get your breadboards? The cheap ones on Ebay are horrible and I don't know where to look else. I think someone might know which ones are good or not. Sorry for the intrusive question.
I know it's not my thread but...

https://www.digikey.com/products/en/pro ... boards/638
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Mike »

Radical Brad wrote:The reason for the digital noise is due to the way I slapped this all together for testing.
When the VIC does "POKE 38917,0", it is triggering the WE line to go low on the frame buffer SRAM.
That same line attempts to disable the counters that are actually generating the video frame.
Because of the few nanoseconds of bus turnaround time, the memory gets the odd glitch.

In my real design, there will be no such quirks, and everything will be double buffered. [...]
This may also happen due to a 'speciality' of how POKE is implemented: the store into memory is done with a STA (zp),Y instruction. Now, on an NMOS 6502, STA (zp),Y takes 6 cycles and puts an invalid address with read access on the busses during its 5th cycle:

Code: Select all

Cycle 1: fetch opcode          (PC)
Cycle 2: fetch zp address      (PC+1)
Cycle 3: fetch low-byte in zp  AL := [zp]
Cycle 4: fetch high-byte in zp AH := [zp+1]
Cycle 5: internal operation    (read from CA15..8 = AH, CA7..0 = (AL+Y) mod 256)
Cycle 6: store A at (zp),Y
Unless a carry propagates into the high-byte of the calculated effective address, this means there are two consecutive accesses to the same byte in the I/O area, first a read and then a write access (in the other case, you get a stray read to an address one page below) ... something read sensitive I/O can muck up. In the later CMOS variants of the 6502 this has been corrected, the last byte of the current instruction is (re-)read instead.

On the C128, there had been similar issues, when POKE was used to access the VDC chip. Instead, two routines were provided in the KERNAL to access the VDC registers without glitches.
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

Thanks for that information. That will certainly be something to consider in this design.
All of my other hardware work has been with a 65C02, which worked in this IO design.

I can also read that address to get the same trigger, as the IO simply looks for that address along with the IO2 line being low.
Instead of STA 38917, I can also do LDA 3897.

I will try that tonight to see if it removes the glitches.
It would be nice to know what is really wrong before I rip up those test wires.

Brad
Mike wrote:
Radical Brad wrote:The reason for the digital noise is due to the way I slapped this all together for testing.
When the VIC does "POKE 38917,0", it is triggering the WE line to go low on the frame buffer SRAM.
That same line attempts to disable the counters that are actually generating the video frame.
Because of the few nanoseconds of bus turnaround time, the memory gets the odd glitch.

In my real design, there will be no such quirks, and everything will be double buffered. [...]
This may also happen due to a 'speciality' of how POKE is implemented: the store into memory is done with a STA (zp),Y instruction. Now, on an NMOS 6502, STA (zp),Y takes 6 cycles and puts an invalid address with read access on the busses during its 5th cycle:

Code: Select all

Cycle 1: fetch opcode          (PC)
Cycle 2: fetch zp address      (PC+1)
Cycle 3: fetch low-byte in zp  AL := [zp]
Cycle 4: fetch high-byte in zp AH := [zp+1]
Cycle 5: internal operation    (read from CA15..8 = AH, CA7..0 = (AL+Y) mod 256)
Cycle 6: store A at (zp),Y
Unless a carry propagates into the high-byte of the calculated effective address, this means there are two consecutive accesses to the same byte in the I/O area, first a read and then a write access (in the other case, you get a stray read to an address one page below) ... something read sensitive I/O can muck up. In the later CMOS variants of the 6502 this has been corrected, the last byte of the current instruction is (re-)read instead.

On the C128, there had been similar issues, when POKE was used to access the VDC chip. Instead, two routines were provided in the KERNAL to access the VDC registers without glitches.
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by eslapion »

Radical Brad wrote:All of my other hardware work has been with a 65C02, which worked in this IO design.
I know somebody who will tell you it's a sacrilege to use a CMOS version of the 6502 in a VIC-20 because the illegal op-codes he uses in his dazzling demos won't work. :roll:
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

I would agree!

One of my unbreakable rules is that the VIC-20 must remain 100% stock in this project.
I am not even allowing myself to remove the cover again.
With one flip of a switch, my VIC will power up and load native demos from disk like any other VIC.

Now having said that, I am fully allowed to place a 65C02 on my logic board.
I like the 65C02. It's faster, and can do STZ, INA, and a few other tricks.

I made my decision last night to make this project into a dual display / dual processor system.
This will offer the best of everything I want out of this project, which is tha ability to fully develop new demos and games for a 6502 system, and to make use of my stock VIC-20 as my main computer.

I will post my new project manifesto later here when I get the chance.
Real development will be starting this weekend!

Brad
eslapion wrote:
Radical Brad wrote:All of my other hardware work has been with a 65C02, which worked in this IO design.
I know somebody who will tell you it's a sacrilege to use a CMOS version of the 6502 in a VIC-20 because the illegal op-codes he uses in his dazzling demos won't work. :roll:
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

Here is the final plan...

Image
The VIC-2000 Expander will be a Dual Processor and Dual Display System.

All of my original hardware design rules will be satisfied...

**** RULES ****
1) Only VIC-20 era logic components and static memory may be used.
2) All chips must be DIP format, and all testing will be done on a breadboard.
3) All chips must still be available and produced by more than one company today.
4) No special ICs such as FPGAs, GALs, or microcontrollers will be used. Just pure 74 logic.
5) The entire V2K system must plug into the back of an unmodified VIC-20.

And all of my reasons for doing this project will be met, which include...

- Using a standard VIC-20 to enjoy 6502 assembly programming.
- Coding cool demos and games without the aid of modern computing.
- No emulators required.
- VIC-20 can still run native software.
- Most powerful real expanded VIC-20 ever!

The posted diagram is very simple, but it shows the majority of what goes on under the hood.
When the single connector is plugged into the VIC-20, here is the process...

1) VIC-20 is held in reset while the logic fills the 512k SRAM (16 pages) with the OS and Applications.
2) The VIC then boots the OS and presents the user with a "VIC Friendly" style OS and IDE.
3) Each of the 16 pages of 32K are swapped by pressing any of the function keys. Each page is a new App.
4) The main app, the IDE / Assembler pulls source code text from the 512K Source Code SRAM.
5) To test the code, the VIC-20 can compile the source directly to the 64K EXE mem connected to the 65C02.
6) The 65C02 is reset by the VIC IDE, and it takes control over the new Sound and Video hardware.
7) The VIC-20 IDE can pause or single step the running 65C02 code, or even peek into the memory.
8) Loading of Sound and Graphic assets is handled by the VIC-20, as requested by the running 65C02 code.

Both the VIC-20 and the GPU have their own independent display systems.
The VIC is connected in the usual manner to a composite device, and the GPU to a VGA monitor.

The entire GPU is just a memory mapped device to the VIC. You could even make it work in Basic!

Ok, that's the basic hardware plan.
Now all I have to do is wire up the 400+ logic ICs that will make this work!

Image

Cheers,
Radical Brad
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

This project is starting to look real now...

Image
Operating System fragment booting and setting up the VGA screen!

I had a few hours of coding time, so here is what V2K can do now...

- VOS-2K boots from ROM and does some VIC-20 initialization and Kernal stuff.
- VIC-20 Screen and cursor setup using the standard 22 x 23 screen size.
- Checking of the external 512K Source Code Memory.
- Initialization of the 400 x 600 mode in the Sync Generator Hardware.
- Basic Row and Column keyboard scanning.

It's not much yet, but does make this project feel like something now.
Next step will be to clean up the breadboard and start laying down the Dual Buffers.

Here is a video of the VGA being initialized as well as my key scan test...

https://youtu.be/R1eGVoCmE5k

A stock VIC-20 commanding 240,000 pixels and 512K of RAM... yeah baby!
That 512K Code Memory is where the VIC will store the assembly text program.
That program will be assembled directly to the 64K EXE Memory used by the 65C02.

I also learned something interesting when I was trying out larger screen sizes with the 6560. You simply cannot safely setup a larger text screen than the standard 22 x 23. I mean, you can certainly do it, and I had what I thought was a nice size at 26 x 32 characters, but after testing on several NTSC monitors, I realized that the frame is way off in the over-scan area on most monitors. You can tweak the width and height on older analog CRTs, but it isn't going to work on a modern LCD. But that's OK, I wanted this project to look like a VIC-20, and it certainly does now.

Hope to have the Dual Buffers up and running soon, and will be able to show the VIC-20 rendering the full 4096 colors onto the 400 x 600 VGA screen. My OS needs a lot more work as well, and I will continue to poke away at it as I work on the hardware.

Vic-2000 - coming to life!
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

Several small sub-systems have now been fully tested, so I can now move on to connecting up the Dual Buffer VGA section as well as the external 512K Source Code Memory. I also rewired the Single Buffer direct write test circuit so that it doesn't glitch when the VIC-20 writes to the Video Memory. Seems I had my V/RW line in the wrong place!

Although I only have 64 of the full 4096 colors connected at this point, you can still see the fine amount of detail that can be drawn on a 400 x 600 resolution screen. Compared to the original 176 x 184 screen on the left side, the one on the right is a bit of a step up...

Image
Hey, look what my VIC-20 drew!

The 400 x 600 pattern is drawn in about 10 seconds by a simple assembly program that just does this simple math on the X and Y screen locations to derive the color value... Color = (X*Y)+X+Y. Most who have done graphics programming would intantly recognize this pattern. I like the way the colors also created a series of diagonal bands over the pattern. Very cool, Mr. VIC!

Image
Try this on your Tandy, Andy!

Here is a video of the VIC-20 doing this live...

https://youtu.be/GjyNRnzEqOw

I sped up the pattern draw time in the video a bit.
You can also see that the borders that VIC drew around the screen are perfectly at the perimeter of the frame.
I always find that the hardest part of making a Video Generator to be the edge pixels.

So I can now move on to the next two sections of the board... Dual Buffer and Source Code Memory.
That 524,288 Bytes Free that VIC is reporting is the size of the Source Code Memory (2^19).

The V2K Assembler will pull text from this memory and display it in the Editor Window.
On assemble, the VIC will do a 2 pass assembly into the 64K of SRAM connected to the external 65C02.
I will probably be able to clock the external 65C02 up to maybe 8MHz if I mind my delays.

Here is the small bit of code that Initializes the SyncGen Memory for the 400 x 600 frame...

Code: Select all

; ////////////////////////////////////////////////////////////////////////////////////////////
; ////////// SYNCGEN INITIALIZATION
; ////////////////////////////////////////////////////////////////////////////////////////////

 
; SET SYSTEM CONTROL REGISTER TO OSMEM PAGE 0 AND SYNC PROGRAM MODE
 LDA #16
 STA IO_SYSREG
 
; RESET SYNCMEM COUNTERS
 STA IO_SYNCRS
 ;STA IO_SYNCCK ; $$$ need? does 590 fully reset on single pulse

; CLEAR HORIZONTAL LOOP COUNTER (X)
 LDX #0
 
; CLEAR VERTICAL LOOP COUNTERS (TEMP1,2)
 STX VAR_TEMP1
 STX VAR_TEMP2
 
 ; RESET SYNC DATA (Y)
 LDY #1+2+4

; SYNCGEN INITIALIZATION LOOP
V2K_SYNCLOOP:

; VERTICAL PIXELS OFF IF LESS THAN 23
 LDA VAR_TEMP2
 CMP #>24;23
 BCC V2K_HPX2
 BNE V2K_VP1
 LDA VAR_TEMP1
 CMP #<24;23
 BCC V2K_HPX2
V2K_VP1:

; VERTICAL PIXELS OFF IF GREATER OR EQUAL TO 623 
 LDA VAR_TEMP2
 CMP #>623
 BCC V2K_VP2
 BNE V2K_HPX2
 LDA VAR_TEMP1
 CMP #<623
 BCS V2K_HPX2
V2K_VP2: 

; HORIZONTAL PIXELS ON AT 06 (Y.5 HI)
 CPX #6
 BNE V2K_HPX1
 TYA
 ORA #32
 TAY 
V2K_HPX1:

; HORIZONTAL PIXELS OFF AT 56 (Y.5 LO)
 CPX #56
 BNE V2K_HPX2
 TYA
 AND #255-32
 TAY 
V2K_HPX2:

; HORIZONTAL SYNC ON AT 58 (Y.7 HI)
 CPX #58
 BNE V2K_HSP
 TYA
 ORA #128
 TAY
V2K_HSP: 

; X RESET AND Y CLOCK ON AT 65 (Y.0 LO / Y.1 LO)
; HORIZONTAL PIXELS OFF AT 65 (Y.5 LO)
 CPX #65
 BNE V2K_HBK
 TYA
 AND #255-1-2-32
 TAY 
V2K_HBK:

; LATCH SYNC DATA
 STY IO_SYNCPD

; WRITE SYNC DATA
 STA IO_SYNCWE
  
; INCREMENT COUNTERS
 STA IO_SYNCCK
   
; HORIZONTAL LOOP FOR 66 PIXELS
 INX
 CPX #66
 BNE V2K_SYNCLOOP
 
; CLEAR HORIZONTAL COUNTER 
 LDX #0

; X RESET AND Y CLOCK OFF AT 65 (Y.0 LO / Y.1 LO)
; HORIZONTAL SYNC OFF AT 0 (Y.7 LO)
 TYA
 AND #255-128
 ORA #1+2
 TAY
  
; VERTICAL SYNC ON AT 624 (Y.6 HI)
 LDA VAR_TEMP1
 CMP #<624
 BNE V2K_VSP
 LDA VAR_TEMP2
 CMP #>624
 BNE V2K_VSP
 TYA
 ORA #64
 TAY 
V2K_VSP:
 
; CONTINUE VERTICAL LOOP FOR 628 LINES
 INC VAR_TEMP1
 BNE V2K_VLP
 INC VAR_TEMP2
V2K_VLP: 
 LDA VAR_TEMP1
 CMP #<628
 BNE V2K_SYNCLOOP
 LDA VAR_TEMP2
 CMP #>628
 BNE V2K_SYNCLOOP

; Y RESET AT END (Y.2 LO)
 TYA
 AND #255-4
 TAY 
 
; LATCH SYNC DATA
 STY IO_SYNCPD

; WRITE SYNC DATA
 STA IO_SYNCWE
 
; RESET SYNCMEM COUNTERS
 STA IO_SYNCRS
  
 ; SET SYSTEM CONTROL REGISTER TO OSMEM PAGE 0 AND SYNC RUN MODE
 LDA #255-1-16
 STA IO_SYSREG
 
Yeah, I will have to go back an optimize the hell out of that one!
To create other video modes, like 400 x 300, you just alter the number of X-Resets per frame.

Ok, time to rip up a lot of wires and clean things up. The board looks like spaghetti!

Later,
Radical Brad
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

No basement hacking time lately, but I did manage to code up a decent keyboard scan routine. It takes a bit of effort to make a low cycle count keyboard decoder when you are doing your own row and column scanning routine.

I can now enter commands into my Console Screen, and hit enter to execute subroutines and test programs.
It's a long way from being an Operating System or IDE, but it is a decent start.

Looking forward to a full day to work on the hardware, as the next step will require a half day at least.

The next project milestone will be the VIC accessing the 512K Source Code Memory and displaying its contents in a scrolling window. It's not a huge amount of technical work, but will require a little of everything... hardware, wiring, and assembly coding.

Basically, I am giving the VIC a content aware rich text editor with 512K of storage.
Sounds easy enough?... time will tell!

Later,
Radical Brad
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Mike »

Radical Brad wrote:No basement hacking time lately, but I did manage to code up a decent keyboard scan routine. It takes a bit of effort to make a low cycle count keyboard decoder when you are doing your own row and column scanning routine.
Well, there's nothing too embarassing wrong with the KERNAL's original keyboard scanner.

Sometimes it's useful though to change the keyboard decode tables. I did that for one of my programs to obtain the C64 PETSCII codes for CBM plus the number keys (which, on the C64, select the upper 8 colours); another program got a true 7-bit ASCII decode mapping - with a corresponding font, no translation is anymore necessary to handle 99.999% of the text body on this planet. ;)

There are alternative keyboard scanners available, most notably Craig's collection from C=Hacking is worth a read:

http://codebase64.org/doku.php?id=magaz ... 8_and_c-64

This is for C64 and C128 though, IIRC the keyboard matrix on the VIC-20 has some rows and columns swapped on the mainboard - the keyboards themselves are exchangeable - and, of course, the VIC-20 uses other registers with the VIA to do the job.

...

That being written, for your text editor it would be a good choice to use ASCII instead of PETSCII, exactly for interoperability reasons.
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Re: VIC-2000 Expander. Modern Power Using Retro Parts!

Post by Radical Brad »

I originally looked at the Kernal Routines, but then decided to roll my own.
That is my system wide rule now.

My key scanner works in 2 different modes for optimal speed...

Mode One : User Console Mode
In this mode, the scanner saves the last key hit, as well as a rolling string of 88 characters (real ASCII converted).
When the RETURN key is struck, the Console Command Parser is executed and looks at the string.

Mode Two : Editor Mode
In this mode, special keys are decoded for cursor movement and function execution.
The resulting ASCII codes are then sent to the Editor for editing the Source Code.

My system works in real ASCII mode, with upper and lower case as expected.

I also have a rule to never use anyone else's code in my projects.
As crazy as it sounds, I don't even like to look at other code, as it ruins the fun of learning for me.
I do appreciate getting help when I ask, but other than that I always prefer learning the hard way.

Thanks,
Brad
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