6561 Die Shot Reversing Explorations

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Kakemoms
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Re: 6561 Die Shot Reversing Explorations

Postby Kakemoms » Mon Nov 20, 2017 8:49 am

norm8332 wrote:I also have a non-working 6560 I could part with if that would work.


PM sent

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Re: 6561 Die Shot Reversing Explorations

Postby norm8332 » Mon Nov 20, 2017 10:26 am

PM replied, I will be sending this today.

EDIT: Sent.

-Norm

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Mon Nov 20, 2017 11:26 am

Fantastic news! Made my day. I was going to see if I could buy one online and then donate it to the cause, but that was probably going to be expensive.

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Re: 6561 Die Shot Reversing Explorations

Postby norm8332 » Mon Nov 20, 2017 11:56 am

lance.ewing wrote:Fantastic news! Made my day. I was going to see if I could buy one online and then donate it to the cause, but that was probably going to be expensive.


It's on its way. I sent it USPS first class mail, it should take only a week or so to get there hopefully. Thank you Kakemoms for giving this a try! I still have another one if needed. They are nearly impossible to find online short of buying another Vic. It took me 6 months to finally find some on e-bay and those are gone now.

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Mon Nov 20, 2017 1:59 pm

There are some available below if anyone is looking for one:

https://www.littlediode.com/components/6560-101.html

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Re: 6561 Die Shot Reversing Explorations

Postby norm8332 » Mon Nov 20, 2017 3:55 pm

lance.ewing wrote:There are some available below if anyone is looking for one:

https://www.littlediode.com/components/6560-101.html


Yeah I saw that too...Just wish they had an actual picture and knew the correct manufacturer, but I'm sure it's fine. Just make sure to check the return policy.

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Wed Nov 22, 2017 5:16 pm

lance.ewing wrote:I still haven't completely worked out what is going on in the vertical counter reset logic. What I have so far isn't making sense compared with what I think I know about how it should work.

I have decided to present the diagram that I have at the moment for the vertical counter reset logic, even though it still doesn't make sense to me. I have a feeling that I have reversed part of it incorrectly, but I'll post what I have and will come back to this post at a later point when and if I discover what it is that I've got wrong. I want to post it now because I've already moved on into other parts of the chip (like the cell depth counter and horizontal cell counter) and want to start posting about what I've discovered in those areas. I didn't want to leave this vertical counter reset logic out of sequence though.

So below we have what I'll call the preliminary version of the diagram. This is for the area that has the purple box around it in the most recent die shot picture that I posted:

vertical_counter_reset_logic_logisim.png
vertical_counter_reset_logic_logisim.png (11.06 KiB) Viewed 151 times

Towards the top left we have a 3-input NOR gate. The first input will be high whenever the vertical counter has a value of 311. The second input will never turn on because the Y decoder says that this turns on whenever the vertical counter is at 312 and the interlace bit is both ON and OFF, which is obviously an impossible scenario (probably done like this to disable the interlace logic). The third input I have called FORCE VCNT.RESET. It will also never turn on because the 6561 in the VIC 20 doesn't use the external reset option. But let's say that the external reset bonding pad was connected to the option pin, then this FORCE VCNT.RESET is a way to reset the vertical counter at any point, regardless of what value it is currently at. You will also notice that it is connected to a pull down transistor that will pull down the output of that small NOR gate slightly left of middle at the top. Normally that smaller NOR gate would have an output of low if X=0 or X=35, but if the reset is being forced, then it pulls that output low and therefore also doesn't care what the horizontal counter value is currently at.

So given that two of the inputs to that large 3-input NOR gate will never go high in the 6561 used by the PAL VIC 20, then it means that the output of that NOR gate will only go low when Y=311. This in turn means that the output I've shown labelled as LAST LINE will turn on when Y=311. This output links to quite a number of other areas in the die shot.

The two outputs in the bottom right hand corner are the two inputs shown in the bottom left corner of the vertical counter diagram that I posted previously. On that previous diagram, I labelled those inputs X=0 and X!=0,35. To be more precise, that X!=0,35 line goes high only when the LAST LINE is low, i.e. only when it is not the last line and X isn't equal to 0 or 35.

For the input X=0 on the vertical counter diagram, it relates to the output of the NOR gate in the bottom right. The net effect of this NOR gate is that the output goes high whenever X=0 but only as long as it isn't the LAST LINE, i.e. only as long as Y != 311. This output going high is what makes the vertical counter increment by one.

The F1 output I've labelled as F1 but actually it will only match F1 as long as VCNT.RESET isn't high.

And that brings us on to VCNT.RESET, which is the bit that confuses me. This output connects to the RESET input shown in the vertical counter diagram I posted. We know that the vertical counter isn't going to count any higher than 311 as a consequence of that logic described above. We also know that there are 312 lines with the PAL VIC chip, and all 312 lines are full 71 cycle lines. To be certain of this, I spent some time with my Picoscope doing various measurements and I'm pretty certain the last line is a full 71 cycle line. The reason I started thinking about this is because of that X=35 input. I assumed it was completely redundant, and a part of me still thinks it is. But the logic I have reversed seems to suggest that the vertical counter would reset when X=35 on the last line. This is what doesn't make sense to me, and is why I'm sure I've got something wrong. Perhaps it would make sense for an interlaced mode but for the 6561, I must be missing something that has disabled this.

Anyway, if we look at what the diagram shows, it says that VCNT.RESET will go high when it is the LAST LINE and either X=0 or X=35. I don't think that it will go high at the start of line 311 because of the timing. X will have already moved on to a value of 1 by the time Y=311 is matched and has gone through that 3-input NOR gate. You'll notice that there are two pass transistors between the Y=311 input and the NOR gate that calculates the VCNT.RESET value, where one of the pass transistors is turned on with F1 and the other with F2. The X=0 input has no such delays, and since it is X=0 that increments the vertical counter to Y=311, then I would expect that X will have moved on to the next value, i.e. 1, by the time the VCNT.RESET value is calculated. If this wasn't the case then we'd only have 311 lines, which obviously we don't.

The only bit that doesn't make sense is that X=35 input. I've simulated this and VCNT.RESET goes high when X=35 on the LAST LINE. It doesn't make sense and clearly I have to check things over a few more times and try to work out why it doesn't reset at that point on the last line.

I'm going to leave it like that for now and will revisit this post to make amendments when I solve this mystery.

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Re: 6561 Die Shot Reversing Explorations

Postby Kakemoms » Fri Nov 24, 2017 9:27 am

Could it be that the circuit restarts once reset gets a negative edge, so it goes high at X=35 and then low again at X=0 (for the first line)?

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Fri Nov 24, 2017 3:24 pm

Yeah, I had a similar thought. It must be something like that I guess. I'm quite eager to see what the 6560 die shot is going to show us, because this vertical counter reset logic involves more inputs than it needs to have for the 6561. I suspected that the X=35 input was for the interlaced mode, which obviously the 6561 doesn't have (or has had disabled internally for some reason).

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Re: 6561 Die Shot Reversing Explorations[

Postby lance.ewing » Fri Nov 24, 2017 5:51 pm

As I mentioned a couple of days ago, I've identified a few more of the counters. This post will focus on the cell depth counter. I'm using the terminology from the datasheet block diagram. The following picture shows where the cell depth counter is on the die shot, highlighted with a red box (I have run out of colours, so the previously identified boxes I have set to light green so that I can reuse a few colours when discussing newly identified parts of the die shot):

cell_depth_counter_and_reset_highlighted.jpg

I have also highlighted the cell depth counter reset logic in pink.

The cell depth counter is a 4-bit counter that is very similar to the design of the horizontal and vertical counters. The logisim diagram is below:

cell_depth_counter_actual.png

I've tried to match the layout on the die shot. So the bits go from bit 0 on the right to bit 3 on the left. The INCREMENT input comes in on the right, as does the RESET. The phase 1 and phase 2 clock inputs come in from the left.

CDC = Cell Depth Counter, and CDC0 = Cell Depth Counter bit 0, and CDC0' is the inverse of CDC0

There are eight outputs from this counter. The inverse value of each bit goes upwards and then enters the cell depth counter reset logic, which I've shown the logisim diagram for below:

cell_depth_counter_reset_logic.png
cell_depth_counter_reset_logic.png (5.73 KiB) Viewed 121 times

The box on the left of the diagram is a logisim counter component that I used to simulate this reset logic. The internals of that counter will be as shown in the 4-bit counter logisim diagram.

This reset logic is really quite simple. The input labelled "D" is the double height character input. The output of this reset logic will be high in one of two scenarios:

  • D = 0, and the cell depth counter has reached a value of 7.
  • D = 1, and the cell depth counter has reached a value of 15.
The output of this reset logic is what links back down to the cell depth counter RESET input to reset its value back to 0.

The other four outputs from the Cell Depth Counter, labelled CDC0 to CDC3, go on a long journey up to the top left quarter of the die shot, which is where the address computation logic lives.

Edit: I wanted to make a note that I'm aware that although the cell depth counter reset logisim diagram above shows that the output will go high when the cell depth counter is either 7 or 15 (depending on D), obviously the cell depth counter won't fully reset until the end of the current line. So there must be a bit more to how the reset works. This output going high doesn't directly reset the counter. What I'm thinking now is that rather than being a reset signal, it is more of a "last value" signal. If this is high and "something else" happens, then it will reset.
Last edited by lance.ewing on Sun Nov 26, 2017 11:26 am, edited 1 time in total.

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Sun Nov 26, 2017 11:13 am

Mike wrote:At some time in the raster VIC-I needs to reload/latch the number of columns for a down-counter ("number of columns left for display") - preferably shortly before the border colour could be displayed.

I have found this down-counter now and it will be the subject of my next post. I think it is what the datasheet calls the "HORZ CELL CNTR", although the block diagram differs a bit from what I'm seeing (I'll discuss those differences in the next post). From what I can tell, it looks like the reload or latching happens at the same time that the horizontal counter is reset to zero. Mike, would that make sense based on PAL VIC programming observations? I guess it would mean that within those initial 12 cycles of horizontal blanking for a line, any changes to the number of columns would be ignored (and obviously also for the rest of the line).

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Sun Nov 26, 2017 3:28 pm

This post will focus on what the 6560/1 datasheet calls the horizontal cell counter in its block diagram:

horizontal_cell_counter_block_diagram.png

It appears in the part of the die shot with the red box around it in the following picture:

horizontal_cell_counter_highlighted.jpg

Control Register 2 (CR2) is immediately above this counter, the lower seven bits of which are the Number of Video Matrix Columns (bits M0-M6 in the datasheet). The logisim diagram, showing the logic I reversed from the die shot for this counter, is shown below:

horizontal_cell_counter_actual.png

At the top of the diagram we have as inputs to the counter the seven bits from the CR2 control register. Bit 0 is on the left and Bit 6 on the right. I have set the state of those 7 input bits such that their combined value is 22, which is the default VIC 20 value for the number of columns. Immediately below these seven inputs we have nine pass transistors that are connected to a LOAD signal. When this value goes high, the counter is reloaded. Seven of those bit values come from CR2. The left most pass transistor is hard-wired to a value of 0.

The horizontal cell counter is an 8-bit counter. The point at which the 8 bits are loaded in to the counter is connected such that the inverse of the 8 bit value coming in is loaded. So, for example, a value of 1 is loaded in to the first bit of the counter, which is the inverse of the hard-wired 0 above that first pass transistor connected to the LOAD line. Likewise the other 7 bits are loaded in to the counter as the inverse of the bit values stored in CR2. The combination of the hard-wired lowest bit, and the inverse values being loaded, means that the one's complement of two times the number of columns is loaded in to the counter, e.g. 22 x 2 = 44 (0x2C hex), the one's complement being 211 (0xD3 in hex), and therefore 211 is the value it starts with.

The design of this counter is very similar to the other counters that we've seen so far, the main differences being that this counter has a value loaded into it rather than it being reset back to zero. Also the layout is flipped upside down when compared to the other three counters we've seen. And unlike the other counters we've seen, there are no outputs taking the current value of the counter anywhere. Instead we have a single output that I have labelled LAST VALUE (a rather generic name which basically means that it has hit the last value that it is going to count up to. I will need a better name for this). This counter does, however, still count upwards, but the net effect of it loading the one's complement of the input in to the counter means that it behaves as if it is counting down. So this is the number of columns down counter implemented as an up counter.

If we look back up at the first picture in this post that shows the block diagram, we'll notice that it suggests that there is an actual comparator that compares the number of columns value with the horizontal cell counter. As we've seen in this post, it doesn't actually do that on the chip, but I guess the end result is similar. Rather than comparing the number of columns with what the horizontal cell counter has counted up to, it instead loads the number of columns in to the counter, multiplying it by 2, performing a one's complement, and then counts up until it hits 255. - It is worth noting that some of the comparators shown in the block diagram do exist on the chip, such as the comparators for the horizontal counter and vertical counter.

As I briefly mentioned in my last post, it appears that the loading of the number of columns in to the counter happens at the time that the horizontal counter resets, so at the start of a line.

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Re: 6561 Die Shot Reversing Explorations[

Postby lance.ewing » Wed Nov 29, 2017 5:29 pm

lance.ewing wrote:I wanted to make a note that I'm aware that although the cell depth counter reset logisim diagram above shows that the output will go high when the cell depth counter is either 7 or 15 (depending on D), obviously the cell depth counter won't fully reset until the end of the current line. So there must be a bit more to how the reset works. This output going high doesn't directly reset the counter. What I'm thinking now is that rather than being a reset signal, it is more of a "last value" signal. If this is high and "something else" happens, then it will reset.

I can now confirm that the output of the logisim diagram that I previously posted in relation to the Cell Depth Counter reset logic is only half the story. The output of that previous diagram is indeed simply the "last value" of the CDC. There is a NAND gate and inverter combination (i.e. net effect an AND) that generates the actual CDC RESET signal:

cdc_reset_logic.png
cdc_reset_logic.png (1.21 KiB) Viewed 61 times

If we now add this AND gate to the previous reset logic diagram, we arrive at the following:

cell_depth_counter_reset_logic_2.png
cell_depth_counter_reset_logic_2.png (7.75 KiB) Viewed 61 times

So it is when the Cell Depth Counter is at its final value (according to the value of the double height bit), and the signal to load the number of columns into the horizontal cell counter goes high, that the Cell Depth Counter is RESET.

I already noted in my previous two posts that the number of columns is loaded into that horizontal cell counter when the horizontal counter resets back to X = 0, i.e. at the start of the line. So LOAD NUM COLUMNS is a synonym for HORIZ COUNTER HAS RESET, or START OF NEW LINE, or whatever you want to call it (I'll rework the names of these inputs and outputs once I have the full picture). Really what we are saying is that the Cell Depth Counter resets to zero at the start of a line if it happened to be at its final value on the previous line.

If you were to try to trick this logic by having the double height bit set to 1 up until the Cell Depth Counter hits 8, and then change D back to 0, it will still continue counting up to 15 and will still generate the CDC LAST VALUE signal at 15, which means on the next line it will still reset the Cell Depth Counter back to 0. So that double height bit is basically ignored by the reset logic in this scenario up until it has reset after 15. Now it might be ignored by the reset logic in this scenario, but the D bit value is also taken up to the address computation logic, which I haven't yet reversed. It will be interesting to see if that address logic always uses the current D value and whether it would therefore by calculating addresses based on single height characters while the Cell Depth Counter is continuing to count up to a double height character.

If you were to have D set to 0, then let the CDC count up to 7, which would generate the CDC LAST VALUE signal, but then changed D to be 1 before the end of the line, then the CDC RESET signal wouldn't be generated because the CDC LAST VALUE signal would turn off before the start of the next line. It doesn't latch that CDC LAST VALUE signal. It would be interesting to see what the behaviour of the address computation logic is in this scenario as well. The CDC LAST VALUE signal is one of the signals that is taken up to the address computation logic.

Note that I am currently including the video matrix counter as part of what I refer to as the address computation logic. The block diagram in the datasheet has them as separate boxes, but it appears that the video matrix counter is right in the midst of the address computation logic, and since I haven't yet started reversing that part of the die shot, I'm calling that whole area the address computation part. No doubt I'll get a clearer picture once I start looking at it.

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Fri Dec 01, 2017 4:44 pm

Before I move on from the Cell Depth Counter, I wanted to take a look at when it increments. So I've extended the diagram from the previous post to include the logic for the increment.

A couple of points that I'll mention that I've probably taken for granted that might be confusing for people. In logisim (the tool that I'm using to build these diagrams), a small square box with either a 0 or a 1 inside it and with a label next to it is an input. When it is in the simulation mode, I can click on those inputs to toggle the value from 0 to 1. The small circles with either a 0 or a 1 inside it is a probe. This is simply a way of seeing what the logic level is on the line it is connected to. I've been primarily using them to show an output from a logic diagram that I've drawn, but I also sometimes use it as a way of labelling a line, which might have been confusing for people. So I've removed the probes from the following diagram and used simple text instead to label the various lines. Hopefully it is a bit easier to follow:

cell_depth_counter_reset_and_increment_logic.png
cell_depth_counter_reset_and_increment_logic.png (10.15 KiB) Viewed 35 times

I'll start the explanation of the above by pointing out again that the box labelled CELL DEPTH CNTR is a logisim counter component. If you want to see what the logic diagram for the Cell Depth Counter itself looks like, you'll need to go back a few posts to the 24th November to see that.

Looking at the diagram above, we see a three input NOR gate at the bottom that controls when the Cell Depth Counter increments by 1. The main trigger for this is the START OF NEW LINE input (which I've previously called LOAD NUM COLUMNS, since the same signal controls the loading of the number of columns in to the horizontal cell counter). But there are two other conditions. Only if the current line is a video matrix line (i.e. it will render part of the video matrix on this line), and only if the Cell Depth Counter isn't resetting, will it increment when it is the start of a new line.

So in summary, the Cell Depth Counter increments at the start of every line that will include rendering the video matrix, unless it has reached its final or last value, in which case it resets.

You might be wondering how I knew what to label that NON MATRIX LINE input as. I know this because I've already reversed the part of the die shot that works out whether the current horizontal counter (X) and vertical counter (Y) values are within the currently defined video matrix position and dimensions. Unfortunately I can't jump in to explaining that until I show several other components, including the vertical cell counter, and the comparators for the screen origin X vs horizontal counter and screen origin Y vs vertical counter values.

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Re: 6561 Die Shot Reversing Explorations

Postby lance.ewing » Fri Dec 01, 2017 5:50 pm

This post will be focusing on what the 6560/1 datasheet calls the vertical cell counter. It counts down the number of rows in the video matrix. The following picture shows where the vertical cell counter is on the die shot highlighted in pink (the horizontal cell counter is highlighted in red to the right of the vertical cell counter):

vertical_cell_counter_highlighted.jpg

Control Register 3 (CR3) is immediately above this counter, the middle six bits (i.e. bit 1 to bit 6 of CR3) of which are the Number of Video Matrix Rows (N0-N5 in the datasheet). The logisim diagram, showing the logic I reversed from the die shot for this counter, is shown below:

vertical_cell_counter_actual.png

At the top of the diagram we have as inputs to the counter the six bits from the CR3 control register. I have set the state of those 6 input bits such that their combined value is 23, which is the default VIC 20 value for the number of rows. Immediately below these six inputs we have six pass transistors that are connected to a LOAD signal. When this value goes high, the counter is reloaded from the middle six bits of CR3.

The vertical cell counter is a 6-bit counter. The point at which the 6 bits are loaded in to the counter is connected such that the inverse of the 6 bit value coming in is loaded. This means that the one's complement of the number of rows is loaded in to the counter.

The design of this counter is very similar to the horizontal cell counter. It counts upwards from the one's complement value, and when it hits 63, the VERTICAL CELL COUNTER LAST VALUE signal goes high.

It is worth noting again that this differs from the 6560/1 datasheet block diagram. That diagram implies that there is a comparator that compares the number of rows with the vertical cell counter, but this isn't what happens. Instead it counts down (implemented as a count up using the one's complement value) until it hits a value of all ones (i.e. 63), at which point it knows it has reached the last row.

For such a down counter, we would want to know when it is incremented and when it is loaded. The answer to the first question, i.e. when is it incremented, is that is it is incremented when the Cell Depth Counter is reset, but only if it isn't loading the number of rows. So when does it load the number of rows? This would appear to be when the vertical counter is resetting from the last line to the first line.


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