FPGA replacement for VIC I chip?

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tlr
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Re: FPGA replacement for VIC I chip?

Post by tlr »

Perhaps it is just one instance of the oscillator shift register?
"Unknown" would be the gate.
The signal gated by F1 would be the inverted feedback.

What is the purpose of d0-d6? Direct write of the contents isn't possible AFAIK.
Also the transistors seemingly gated by the feedback signal makes no sense. Did you trace it correctly?
lance.ewing
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Re: FPGA replacement for VIC I chip?

Post by lance.ewing »

D0 - D6 are coming from those bit positions of the noise control register, so they're meant to be determining the frequency of the noise. Therefore that feedback would appear to be what triggers it to reload what the frequency should be.

Yeah, this is certainly only half of the area that is related to the noise generator and its quite possible its not the main part. The other part will hopefully answer some questions. I'm away on holiday for a few weeks at present so won't be able to return to this until I get back.

Edit: One of the first things I'll do is recheck the tracing related to that NOR gate and the long feedback line.
Last edited by lance.ewing on Fri Aug 12, 2016 9:22 pm, edited 1 time in total.
tlr
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Re: FPGA replacement for VIC I chip?

Post by tlr »

Ah, in that case it must be a 7-bit ripple counter with preset. That wide NOR detects when it's all zeroes or ones depending how you see it. I can't immediately see how the toggle/ripple works but note the inverter on every other D and how the taps for the NOR come from alternating sides of the presumed feedback inverters.
Kakemoms
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Re: FPGA replacement for VIC I chip?

Post by Kakemoms »

tlr wrote:Ah, in that case it must be a 7-bit ripple counter with preset. That wide NOR detects when it's all zeroes or ones depending how you see it. I can't immediately see how the toggle/ripple works but note the inverter on every other D and how the taps for the NOR come from alternating sides of the presumed feedback inverters.
Yes and no. Because the numbers only repeat themselves you only get all of them 0 if the first instance is 0. I guess a wider picture may explain more as this looks more like a smaller part of a larger loop.
lance.ewing
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Re: FPGA replacement for VIC I chip?

Post by lance.ewing »

I've spent a bit of time visually comparing the noise generator with the three tone generators, and the part we've been looking at so far in the noise generator appears (as far as I can tell at present) also at the start of the three tone generators. So it appears that we haven't yet reached the noise specific part. I have a suspicion I know what part it might be and unfortunately it isn't the next part we'll be looking at either. But I'll need to continue tracking it through to see where it is fed in.
Kakemoms
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Re: FPGA replacement for VIC I chip?

Post by Kakemoms »

I have been working on some Verilog in the past weeks and it is quite straight-forward to implement a noise generator using the previously discussed equations. So apart for the noise generator circuit being interesting, it may be even more interesting to look at the sound generator in general. Or maybe you have already?

I am wondering how much work it will be to make a replacement of the VIC with a CPLD. I already have some CPLDs from mouser (+ two breakout boards). It may make sense to use it to get HDMI output instead as that would enable newer TVs to use it directly (as long as one can get the CPLD to that speed). Has anyone tried that?
groepaz
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Re: FPGA replacement for VIC I chip?

Post by groepaz »

i'd start developing with an FPGA of at least twice the "size" (amount of LEs) that you will need, then test it and debug it, and perhaps you can then even make it small enough to fit into some CPLD. i'd estimate at least a year of work for someone with good vic20 and vhdl/verilog knowledge.
I'm just a Software Guy who has no Idea how the Hardware works. Don't listen to me.
Kakemoms
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Re: FPGA replacement for VIC I chip?

Post by Kakemoms »

Well, the breakout board I have is a lattice MACHXO3 with 6800 LUTs. You can argue that its not really a CPLD anymore as it only requires about 1000 LUTs for the Arlets 6502 core. WDC even sells a commercial 65C02 core for it which is around 2500 LUTs. But anyway, it should be big enough for a 6560/1 implementation in Verilog (and there are plenty of HDMI examples around).
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