Hacking in a reset switch

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Radical Brad
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Re: Hacking in a reset switch

Postby Radical Brad » Tue Dec 12, 2017 2:30 pm

I am going to revive this thread because during my searching for VIC-20 Reset information, it was always in the top 10 results.

What I would like to say is that I also use an external reset on a VIC, but do so knowing the following...

1) You are actually causing contention, as the RST line is already driven by a 74LS06 inverter directly.
2) Driving RST with another IO, must be done as open drain, or you could create more contention.

So, you are really shorting the output pins on one of the ICs on the VIC-20 main board by adding an external reset. And in my case (using an FPGA), I have to also take the precaution to tri-state my IO after pulling the reset momentarily low (open drain), or I could cause other problems on my external hardware.

Just wanted to point that out, as none of the information I found made any warning about this.
A 100 ohm resistor in series with the output on the 7406 driven by the 555 timer would solve this contention, but I am not making any internal mods to my vintage VIC!


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