Denial

Furthermore I'm trying to comprehend the concept of generating A13 and A14 out of BLK1-3, which Mike has given me some insight already. You need to differentiate between the address range of the 6502 and the address range of the RAM chip. CA0 .. CA13 are the lower 14 bits of the C PU A ddress-Bus e...

Indeed there are different ways to combine /BLK1, /BLK2, /BLK3 and /BLK5 to form A13, A14 and /CS. The only prerequisite is, that one of the /BLKx going low results in a unique one of the four possible combinations of A13, A14; and if any one of the /BLKx signals goes low, so should also do /CS. Tak...

I didn't put the resistor network in place, but it already works. Without the resistor network, only the inputs of UD9 remain to define the signal level of the original /RAMx lines on the mainboard. UD9 itself regards these open lines as having H-level (but only barely), for this reason the VIC-20 ...

In my VIC-20, I also have a MOS 6502B. That's just the variant of the 6502 rated for 3 MHz (bare 6502: 1 MHz, 6502A: 2 MHz). Of course it also runs at lower frequencies like the ~1 MHz of the VIC-20. Commodore just used any CPU that was available. The variant of the 6502 used in the 8-bit Ataris and...

Witzo wrote:Or was it [...]?

In CBM BASIC, -1 for true, 0 for false.

Just two points to these two lines of the program: 370 if a$<>"" then print #5,chr$(t%(asc(a$))); [...] 400 if(peek(37151)and 64)=1 then 400 Line 370: normally, BASIC V2 isn't too picky about the placement of spaces, but in the case of PRINT# and INPUT#, the hash character actually is part...

So I have a vic-20 (with dynamic ram) which is faster than a c64 because the c64 has dynamic ram. Erm, no. On the C64, the VIC-II is responsible for DRAM refresh. For this it does 5 refresh cycles on each raster line, during horizontal retrace. What slows down the CPU a bit, is the extra DMA necess...

Z0rbVIC wrote:How can I bump that up for a 16 bit address in hex?

I deliberately left that as exercise.

pallas wrote:I was thinking the same: is my ram expansion slower? Here is the screenshot: [...]

... which confirms my later edit. Your DRAM expander does not introduce wait states for the CPU.

You can use MID$(STR$(...),2) to strip off the first character of the numeric string. The blank character serves as placeholder for the minus sign, so negative numbers wouldn't disturb the layout. And the conversion of numbers in the range 0 .. 255 into a two-digit hex string can be expressed somewh...

- it has dynamic ram instead of static It would be interesting to know if the DRAM refresh introduces wait cycles. The program MG Raster employs a cycle exact interrupt to change the VIC registers several times on each line, and during the visible part of the screen it relies upon that there are 71...

I'd like to add these two:

* Frogger '07 - plays like the arcade, and

* Omega Fury - great successor of Omega Race.

Another one for a rainy Sunday - the rendition of a broken Penrose tribar with MINIGRAFIK: ( download ) https://dateipfa.de/.Public/denial/images/minigrafik/tribar.png Here's the listing. The assignment 'A=5/3' in line 11 refers to PAL, NTSC users should replace it with 'A=3/2' to compensate for the...

HermanVIC wrote:AC on the supply is around .4 volts on all three.

Now that's definitely outside spec.

You should replace both C39 (4700 µF/16 V) and C44 (100 µF/16 V). As with all electrolytic capacitors, take care of their polarization. Then redo both DC and AC checks on the 5 V supply voltage.

One is working through composite video. O.K. I read about that one in another thread. At first, let's assume the modulator is at fault here, and concentrate on the two defective VIC-20s. All use two prong power supply. I have multimeter [...] I suppose the fuse is in order. With voltage measurement...